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ACER 4390 AS4925 LA4201P JAL90


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Compal Confidential
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JAL90 M/B Schematics Document
Intel Penryn Processor with Cantiga + DDRII + ICH9M

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2008-07-04 REV:1.0

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4

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Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc. SCHEMATIC,LA-4201P 401551
Sheet
E

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev I 1 of 50

Date:

Monday, July 21, 2008

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Compal Confidential
Model Name : JAL90 File Name : LA-4201P
1

Fan Control

Intel Penryn Processor
uPGA-478 Package (Socket P) page
H_A#(3..35) 4,5,6

page 36

Thermal Sensor EMC1402-1-ACZL
page 4

Clock Generator ICS9LPRS387
page 16

FSB 667/800/1066MHz

1

H_D#(0..63)

HDMI Conn.
page 20

LCD Conn.
page 18

CRT Conn.
page 19

LVDS TMDS Card Reader JMB385
page 26 page 17

Intel Cantiga
uFCBGA-1329

Memory BUS(DDRII)
Dual Channel
1.8V DDRII 533/667

200pin DDRII-SO-DIMM X2
BANK 0, 1, 2, 3
page 14,15

LVDS

MXM II VGA/B

PCI-Express 16X DMI PCI-Express

page 7,8,9,10,11,12,13

LS-4201P

C-Link

USB conn x2
USB port 0, 2
page 30

Bluetooth Conn
page 30

CMOS Camera
page 18

Finger Print
AES1610
page 30

2

Intel ICH9-M
BGA-676
page 21,22,23,24

3.3V 48MHz

USB HD Audio

2

3.3V 24.576MHz/48Mhz S-ATA

New Card Socket
page 30

MINI Card x2
WLAN, Robson2
page 29

LAN(GbE)
Realtek RTL8111C
page 27

port 0

port 1

GMCH HDA
page 08

DOCKING (DVI/LAN/ CRT/USB/AUDIO)
page 38
3

RJ45
page 28

SATA HDD Conn. page 25

CDROM Conn. page 25

MDC 1.5 Conn 33 page

HDA Codec
ALC888S-VC
page 34

MXM HDA
page 17

Audio AMP
LS-4208P

LPC BUS

page 35
3

Media/B Conn.
page 32

RTC CKT.
page 22

LS-4202P

ENE KB926
page 31

Phone Jack x3
page 35

BTN/B Conn.
LS-4204P

page 32

Power On/Off CKT.
page 33

PWR/B Conn.
page 32

Touch Pad

Int.KBD
page 32

page 32

EC I/O Buffer DC/DC Interface CKT.
page 37

BIOS
page 32

LS-4205P

page 32

USB/B Conn.
USB port 4
page 29

CIR Power Circuit DC/DC
4

LS-4206P

page 33
4

page 39,40,41,42 43,44,45,46

UMA HDMI/B
LS-4205P

COVER LIGHT Conn page 36
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Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc. SCHEMATIC,LA-4201P
Document Number Rev I 2 of 50

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C D

401551
Monday, July 21, 2008
E

Date:

Sheet

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STATE

SIGNAL

SLP_S1# SLP_S3# SLP_S4# SLP_S5# HIGH LOW LOW LOW LOW HIGH HIGH LOW LOW LOW HIGH HIGH HIGH LOW LOW HIGH HIGH HIGH HIGH LOW

+VALW ON ON ON ON ON

+V ON ON ON OFF OFF

+VS ON ON OFF OFF OFF

Clock ON LOW OFF OFF OFF
1

Voltage Rails
Power Plane VIN B+
1

Full ON
Description Adapter power supply (19V) AC or battery power rail for power circuit. Core voltage for CPU 0.9V switched power rail for DDR terminator 1.05V switched power rail 1.25V switched power rail 1.5V power rail for HDA 1.5V switched power rail 1.8V power rail for DDR 1.8V switched power rail 2.5V switched power rail 3.3V always on power rail 3.3V power rail for SB 3.3V power rail for LAN 3.3V switched power rail 5V always on power rail 5V switched power rail VSB always on power rail RTC power S1 N/A N/A ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON S3 N/A N/A OFF OFF OFF OFF ON OFF ON OFF OFF ON ON ON OFF ON OFF ON ON S5 N/A N/A OFF OFF OFF OFF OFF OFF OFF OFF OFF ON* X X OFF ON* OFF ON* ON

S1(Power On Suspend) S3 (Suspend to RAM) S4 (Suspend to Disk) S5 (Soft OFF)

+CPU_CORE +0.9VS +1.05VS +1.25VS +1.5V +1.5VS +1.8V +1.8VS +2.5VS +3VALW +3V +3V_LAN +3VS +5VALW +5VS +VSB

Board ID / SKU ID Table for AD channel
Vcc Ra/Rc/Re
Board ID

0 1 2 3 4 5 6 7

3.3V +/- 5% 100K +/- 5% Rb / Rd / Rf 0 8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5% NC

V AD_BID min 0 V 0.168 V 0.375 V 0.634 V 0.958 V 1.372 V 1.851 V 2.433 V

V AD_BID typ 0 V 0.250 V 0.503 V 0.819 V 1.185 V 1.650 V 2.200 V 3.300 V

V AD_BID max 0.155 V 0.362 V 0.621 V 0.945 V 1.359 V 1.838 V 2.420 V 3.300 V
2

2

+RTCVCC

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

BOARD ID Table External PCI Devices
Device IDSEL# REQ#/GNT# Interrupts

BTO Option Table
PCB Revision 0.1 0.2 0.3 1.0 1A BTO Item JAL90 JAW50/KAW00 UMA JAL90-UMA JAW50/KAW00 Discrete Discrete ALC888VC ALC888VB 8111C 8102E ALC268 JAL90/JAW50 KAW00 JAL90/JAW50 KAW00 JAL90-DIS JAW50-DIS JAW50-UMA BOM Structure JAL90@ JAW50@ GM@ JAL90GM@ GLPM@ PM@ 888VC@ 888VB@ 8111C@ 8102E@ 268@ ABO@ EM@ JAL9050@ JAL90PM@ JAW50PM@ JAW50GL@

Board ID 0 1 2 3 4 5 6 7

EC SM Bus1 address
3

EC SM Bus2 address
Device
ADI ADT7421

Device
Smart Battery

Address
0001 011X b

Address
1001 100X b

3

EEPROM(24C16/02) 1010 000X b GMT G781-1 1001 101X b

ICH9M SM Bus address
Device
Clock Generator (ICS9LPRS387, SLG8SP556V) DDR DIMM0 DDR DIMM2

Address
1101 001Xb 1001 000Xb 1001 010Xb

BOM Configuration Table
Project JAL90-UMA JAL90-Dis JAW50-UMA JAW50-DIS KAW00 BOM Configuration 431551BOL01:JAL90GM@/JAL9050@/JAL90@/GM@/888VC@/8111C@/ABO@ 431551BOL02:PM@/JAL90PM@/JAL9050@/JAL90@/GLPM@/888VC@/8111C@/ABO@ 431551BOL11:JAW50@/JAW50GL@/JAL9050@/GM@/GLPM@/8111C@/268@/ABO@ 431551BOL12:PM@/JAW50@/JAW50PM@/JAL9050@/GLPM@/8111C@/268@/ABO@ 431551BOL31:JAW50@/JAW50GL@/JAL9050@/GM@/GLPM@/8111C@/268@/EM@

4

4

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc. SCHEMATIC,LA-4201P
Document Number Rev I Sheet
E

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A B C D

401551
Monday, July 21, 2008 3 of 50

Date:

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1

7 H_A#[3..35] 7 H_REQ#[0..4] 7 H_RS#[0..2]

H_A#[3..35] H_REQ#[0..4] H_RS#[0..2] JCPU1A H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16

D

CONTROL

7 H_ADSTB#0 H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35 7 H_ADSTB#1 22 H_A20M# 22 H_FERR# 22 H_IGNNE# 22 H_STPCLK# 22 H_INTR 22 H_NMI 22 H_SMI#

J4 L5 L4 K5 M3 N2 J1 N3 P5 P2 L2 P4 P1 R1 M1 K3 H2 K2 J3 L1 Y2 U5 R3 W6 U4 Y5 U1 R4 T5 T3 W2 W5 Y4 U2 V4 W3 AA4 AB2 AA3 V1 A6 A5 C4 D5 C6 B4 A3 M4 N5 T2 V3 B2 D2 D22 D3 F6

A[3]# A[4]# A[5]# A[6]# A[7]# A[8]# A[9]# A[10]# A[11]# A[12]# A[13]# A[14]# A[15]# A[16]# ADSTB[0]# REQ[0]# REQ[1]# REQ[2]# REQ[3]# REQ[4]# A[17]# A[18]# A[19]# A[20]# A[21]# A[22]# A[23]# A[24]# A[25]# A[26]# A[27]# A[28]# A[29]# A[30]# A[31]# A[32]# A[33]# A[34]# A[35]# ADSTB[1]#

ADS# BNR# BPRI# DEFER# DRDY# DBSY# BR0# IERR# INIT# LOCK#

H1 E2 G5 H5 F21 E1 F1 D20 B3 H4 C1 F3 F4 G3 G2 G6 E4 AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6 AB3 AB5 AB6 C20
H_RESET# H_RS#0 H_RS#1 H_RS#2 H_IERR#

H_ADS# 7 H_BNR# 7 H_BPRI# 7 H_DEFER# 7 H_DRDY# 7 H_DBSY# 7 H_BR0# 7 H_INIT# 22 H_LOCK# 7 H_RESET# 7

XDP/ITP SIGNALS

ADDR GROUP_0

D

RESET# RS[0]# RS[1]# RS[2]# TRDY# HIT# HITM# BPM[0]# BPM[1]# BPM[2]# BPM[3]# PRDY# PREQ# TCK TDI TDO TMS TRST# DBR#

H_TRDY# 7 H_HIT# 7 H_HITM# 7

ADDR GROUP_1

C

XDP_BPM#5 XDP_TCK XDP_TDI XDP_TMS XDP_TRST# XDP_DBRESET#

C

XDP_DBRESET# 23 +1.05VS

THERMAL
PROCHOT# THERMDA THERMDC THERMTRIP# D21 A24 B25 C7
H_PROCHOT# H_THERMDA H_THERMDC H_THERMTRIP# 8,22 XDP_TMS R16 R8

XDP_TDI

R17

1

2

54.9_0402_1%

A20M# FERR# IGNNE#

STPCLK# LINT0 LINT1 SMI# RSVD[01] RSVD[02] RSVD[03] RSVD[04] RSVD[05] RSVD[06] RSVD[07] RSVD[08] RSVD[09]

RESERVED

ICH ICH

left NC if no ITP
1 1 @ 2 2
54.9_0402_1% 54.9_0402_1%

39Ohm

H CLK
BCLK[0] BCLK[1] A22 A21
CLK_CPU_BCLK 16 CLK_CPU_BCLK# 16

XDP_BPM#5

H_PROCHOT# H_IERR#

R32 R31

2 2

1 1

56_0402_5% 56_0402_5%

Layout Note: H_THERMDA&H_THERMDC Trace / Space = 10 / 10 mil
XDP_TRST# XDP_TCK R13 R7

B

2 1

1 2

54.9_0402_1% 54.9_0402_1%

B

Penryn CONN@ +3VS C95 0.1U_0402_16V4Z 1 2

BSEL2
0 0 0

BSEL1
0 1 1

BSEL0
0 0 1

BCLK
266 200 166
H_PROCHOT#

+1.05VS H_THERMDA

U8

1

1
R39 56_0402_5% @ C94

1 2 3 4

VDD DP DN THERM#

SMCLK SMDATA ALERT# GND

8 7 6 5 1

EC_SMB_CK2 31,32 EC_SMB_DA2 31,32

2200P_0402_50V7K 2 H_THERMDC

2 R541 10K_0402_5%

+3VS

2

2
B E

A

3

1

OCP# 23

EMC1402-1-ACZL-TR_MSOP8

A

Q2 MMBT3904_SOT23-3 @

C

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc. SCHEMATIC,LA-4201P
Document Number Rev I Sheet
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2

401551
Monday, July 21, 2008 4 of 50

Date:

5

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1

H_D#[0..63] JCPU1B
D

H_D#[0..63]

7 +CPU_CORE

JCPU1C

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 7 H_DSTBN#0 7 H_DSTBP#0 7 H_DINV#0 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 7 H_DSTBN#1 7 H_DSTBP#1 7 H_DINV#1 R317 R316

E22 F24 E26 G22 F23 G25 E25 E23 K24 G24 J24 J23 H22 F26 K22 H23 J26 H26 H25 N22 K25 P26 R23 L23 M24 L22 M23 P25 P23 P22 T24 R24 L25 T25 N25 L26 M26 N24 AD26 C23 D25 C24 AF26 AF1 A26 C3 B22 B23 C21

D[0]# D[1]# D[2]# D[3]# D[4]# D[5]# D[6]# D[7]# D[8]# D[9]# D[10]# D[11]# D[12]# D[13]# D[14]# D[15]# DSTBN[0]# DSTBP[0]# DINV[0]# D[16]# D[17]# D[18]# D[19]# D[20]# D[21]# D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]# D[29]# D[30]# D[31]# DSTBN[1]# DSTBP[1]# DINV[1]# GTLREF TEST1 TEST2 TEST3 TEST4 TEST5 TEST6 TEST7 BSEL[0] BSEL[1] BSEL[2]
Penryn CONN@

D[32]# D[33]# D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]# D[41]# D[42]# D[43]# D[44]# D[45]# D[46]# D[47]# DSTBN[2]# DSTBP[2]# DINV[2]# D[48]# D[49]# D[50]# D[51]# D[52]# D[53]# D[54]# D[55]# D[56]# D[57]# D[58]# D[59]# D[60]# D[61]# D[62]# D[63]# DSTBN[3]# DSTBP[3]# DINV[3]# COMP[0] COMP[1] COMP[2] COMP[3]

Y22 AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22 AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20 R26 U26 AA1 Y1 E5 B5 D24 D6 D7 AE6

H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_DSTBN#2 7 H_DSTBP#2 7 H_DINV#2 7 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 H_DSTBN#3 7 H_DSTBP#3 7 H_DINV#3 7 COMP0 COMP1 COMP2 COMP3 R295 R291 R10 R12

C

+1.05VS

R287 1K_0402_1%

Trace Close CPU < 0.5' Width=4 mil , Spacing: 15mil (55Ohm)
2

2 2

R289 2K_0402_1%

C381 1

GTL_REF0 TEST1 1 @ 1K_0402_5% TEST2 1 @ 1K_0402_5% TEST3 PAD @ T4 2 @ 0.1U_0402_16V4Z TEST4 TEST5 PAD @ T2 TEST6 @ T13 PAD 16 CPU_BSEL0 16 CPU_BSEL1 16 CPU_BSEL2

MISC

1 1 1 1

2 2 2 2

27.4_0402_1% 54.9_0402_1% 27.4_0402_1% 54.9_0402_1%

DPRSTP# DPSLP# DPWR# PWRGOOD SLP# PSI#

H_PWRGOOD H_CPUSLP#

H_DPRSTP# 8,22,46 H_DPSLP# 22 H_DPWR# 7 H_PWRGOOD 22 H_CPUSLP# 7 PSI# 46

TRACE CLOSELY CPU < 0.5'
B

COMP0, COMP2 layout : Width 18mils and Space 25mils (27.4Ohms) COMP1, COMP3 layout : Width 4mils and Space 25mils (55Ohms)

A7 A9 A10 A12 A13 A15 A17 A18 A20 B7 B9 B10 B12 B14 B15 B17 B18 B20 C9 C10 C12 C13 C15 C17 C18 D9 D10 D12 D14 D15 D17 D18 E7 E9 E10 E12 E13 E15 E17 E18 E20 F7 F9 F10 F12 F14 F15 F17 F18 F20 AA7 AA9 AA10 AA12 AA13 AA15 AA17 AA18 AA20 AB9 AC10 AB10 AB12 AB14 AB15 AB17 AB18

VCC[001] VCC[002] VCC[003] VCC[004] VCC[005] VCC[006] VCC[007] VCC[008] VCC[009] VCC[010] VCC[011] VCC[012] VCC[013] VCC[014] VCC[015] VCC[016] VCC[017] VCC[018] VCC[019] VCC[020] VCC[021] VCC[022] VCC[023] VCC[024] VCC[025] VCC[026] VCC[027] VCC[028] VCC[029] VCC[030] VCC[031] VCC[032] VCC[033] VCC[034] VCC[035] VCC[036] VCC[037] VCC[038] VCC[039] VCC[040] VCC[041] VCC[042] VCC[043] VCC[044] VCC[045] VCC[046] VCC[047] VCC[048] VCC[049] VCC[050] VCC[051] VCC[052] VCC[053] VCC[054] VCC[055] VCC[056] VCC[057] VCC[058] VCC[059] VCC[060] VCC[061] VCC[062] VCC[063] VCC[064] VCC[065] VCC[066] VCC[067]
Penryn CONN@

DATA GRP 3

VCC[068] VCC[069] VCC[070] VCC[071] VCC[072] VCC[073] VCC[074] VCC[075] VCC[076] VCC[077] VCC[078] VCC[079] VCC[080] VCC[081] VCC[082] VCC[083] VCC[084] VCC[085] VCC[086] VCC[087] VCC[088] VCC[089] VCC[090] VCC[091] VCC[092] VCC[093] VCC[094] VCC[095] VCC[096] VCC[097] VCC[098] VCC[099] VCC[100] VCCP[01] VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16] VCCA[01] VCCA[02] VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6] VCCSENSE VSSSENSE
.

AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20 G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21 B26 C26

+CPU_CORE
D

DATA GRP 2

DATA GRP 0 DATA GRP 1

C

+1.05VS

1

2

20mils
+1.5VS CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 CPU_VID6 1 R286 VCCSENSE VSSSENSE C85 C93 46 46 46 0.01U_0402_16V7K 2 2 46 46 10U_0805_10V4Z 46 46 2 +CPU_CORE 100_0402_1% VCCSENSE 46 VSSSENSE 46

1

1

1

AD6 AF5 AE5 AF4 AE3 AF3 AE2 AF7 AE7

B

1 R285

2 100_0402_1%

A

A

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc. SCHEMATIC,LA-4201P
Document Number Rev I Sheet
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2

401551
Monday, July 21, 2008 5 of 50

Date:

5

4

3

2

1

+CPU_CORE

+CPU_CORE

2 x 330uF(6mOhm/2)
JCPU1D

2 x 330uF(6mOhm/2)
1
C98 + C7 @ 330U_D2E_2.5VM_R9 2

1 VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163]
.

1
C377 +

1
+

D

C

B

A4 A8 A11 A14 A16 A19 A23 AF2 B6 B8 B11 B13 B16 B19 B21 B24 C5 C8 C11 C14 C16 C19 C2 C22 C25 D1 D4 D8 D11 D13 D16 D19 D23 D26 E3 E6 E8 E11 E14 E16 E19 E21 E24 F5 F8 F11 F13 F16 F19 F2 F22 F25 G4 G1 G23 G26 H3 H6 H21 H24 J2 J5 J22 J25 K1 K4 K23 K26 L3 L6 L21 L24 M2 M5 M22 M25 N1 N4 N23 N26 P3

VSS[001] VSS[002] VSS[003] VSS[004] VSS[005] VSS[006] VSS[007] VSS[008] VSS[009] VSS[010] VSS[011] VSS[012] VSS[013] VSS[014] VSS[015] VSS[016] VSS[017] VSS[018] VSS[019] VSS[020] VSS[021] VSS[022] VSS[023] VSS[024] VSS[025] VSS[026] VSS[027] VSS[028] VSS[029] VSS[030] VSS[031] VSS[032] VSS[033] VSS[034] VSS[035] VSS[036] VSS[037] VSS[038] VSS[039] VSS[040] VSS[041] VSS[042] VSS[043] VSS[044] VSS[045] VSS[046] VSS[047] VSS[048] VSS[049] VSS[050] VSS[051] VSS[052] VSS[053] VSS[054] VSS[055] VSS[056] VSS[057] VSS[058] VSS[059] VSS[060] VSS[061] VSS[062] VSS[063] VSS[064] VSS[065] VSS[066] VSS[067] VSS[068] VSS[069] VSS[070] VSS[071] VSS[072] VSS[073] VSS[074] VSS[075] VSS[076] VSS[077] VSS[078] VSS[079] VSS[080] VSS[081]
Penryn CONN@

P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25

C378

+

330U_D2E_2.5VM_R9 2

330U_D2E_2.5VM_R9 2

330U_D2E_2.5VM_R9 2
D

South Side Secondary
+CPU_CORE

North Side Secondary

1

C409

1

C413

1

C390

1

C68

1

C70

1

C64

1

C60

1

C402

10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 2 2 2 2 2 2 2 2 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M

(Place these capacitors on South side,Secondary Layer)
+CPU_CORE

1

C21

1

C20

1

C19

1

C18

1

C17

1

C394

1

C403

1

C69

10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 2 2 2 2 2 2 2 2 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M

(Place these capacitors on North side,Secondary Layer)
+CPU_CORE

C

1

C78

1

C77

1

C76

1

C75

1

C386

1

C382

1

C65

1

C59

10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 2 2 2 2 2 2 2 2 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M

(Place these capacitors on South side,Primary Layer)
+CPU_CORE

1

C395

1

C391

1

C384

1

C385

1

C410

1

C383

1

C411

1

C412

10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 2 2 2 2 2 2 2 2 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M

(Place these capacitors on North side,Primary Layer)

B

+CPU-CORE Decoupling SPCAP,Polymer MLCC 0805 X5R

C,uF 4X330uF 32X22uF 32X10uF

ESR, mohm 6m ohm/4 3m ohm/32 3m ohm/32

ESL,nH 1.8nH/6 0.6nH/32 0.6nH/32

+1.05VS

1
+ C73

1

C30

1 C16

1

C13

1

C31

1

C29

1

C61

330U_D2E_2.5VM_R15 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 2 2 2 2 2 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z

A

A

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc. SCHEMATIC,LA-4201P
Document Number Rev I Sheet
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2

401551
Monday, July 21, 2008 6 of 50

Date:

5

4

3

2

1

5 H_D#[0..63] H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 H_SWING H_RCOMP

U31A

H_A#[3..35]

4

D

+1.05VS

R69 221_0402_1%

H_SWING

width=10mil
R68 100_0402_1%

C

1

C155 0.1U_0402_16V4Z

H_RCOMP

width=10mil
R334 24.9_0402_1%

2

1

HOST

2

B

F2 G8 F8 E6 G2 H6 H2 F6 D4 H3 M9 M11 J1 J2 N12 J6 P2 L2 R2 N9 L6 M5 J3 N2 R1 N5 N6 P13 N8 L7 N10 M3 Y3 AD14 Y6 Y10 Y12 Y14 Y7 W2 AA8 Y9 AA13 AA9 AA11 AD11 AD10 AD13 AE12 AE9 AA2 AD8 AA3 AD3 AD7 AE14 AF3 AC1 AE3 AC3 AE11 AE8 AG2 AD6 C5 E3

H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63 H_SWING H_RCOMP

H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8 H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35 H_ADS# H_ADSTB#_0 H_ADSTB#_1 H_BNR# H_BPRI# H_BREQ# H_DEFER# H_DBSY# HPLL_CLK HPLL_CLK# H_DPWR# H_DRDY# H_HIT# H_HITM# H_LOCK# H_TRDY#

A14 C15 F16 H13 C18 M16 J13 P16 R16 N17 M13 E17 P17 F17 G20 B19 J16 E20 H16 J20 L17 A17 B17 L16 C21 J17 H20 B18 K17 B20 F21 K21 L20 H12 B16 G17 A9 F11 G12 E9 B10 AH7 AH6 J11 F9 H9 E12 H11 C9

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35 H_ADS# H_ADSTB#0 H_ADSTB#1 H_BNR# H_BPRI# H_BR0# H_DEFER# H_DBSY# CLK_MCH_BCLK CLK_MCH_BCLK# H_DPWR# H_DRDY# H_HIT# H_HITM# H_LOCK# H_TRDY# H_ADS# 4 H_ADSTB#0 4 H_ADSTB#1 4 H_BNR# 4 H_BPRI# 4 H_BR0# 4 H_DEFER# 4 H_DBSY# 4 CLK_MCH_BCLK 16 CLK_MCH_BCLK# 16 H_DPWR# 5 H_DRDY# 4 H_HIT# 4 H_HITM# 4 H_LOCK# 4 H_TRDY# 4

D

2

2

1

C

1

H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3 H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3 H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3 H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4 H_RS#_0 H_RS#_1 H_RS#_2

J8 L3 Y13 Y1 L10 M7 AA5 AE6 L9 M8 AA6 AE5 B15 K13 F13 B13 B14 B6 F12 C8

H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3 H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3 H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_RS#0 H_RS#1 H_RS#2

H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3 H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 5 5 5 5

5 5 5 5

B

+1.05VS

H_DSTBP#0 5 H_DSTBP#1 5 H_DSTBP#2 5 H_DSTBP#3 5 H_REQ#[0..4]

4

2
R77 1K_0402_1%

4 H_RESET# 5 H_CPUSLP#

H_RESET# H_CPUSLP# H_AVREF

C12 E11 A11 B11

H_CPURST# H_CPUSLP# H_AVREF H_DVREF

H_RS#[0..2]

4

width:spacing=10mil:20mil (<0.5")
1
R74 2K_0402_1%

1

1

2

C161 @ 0.1U_0402_16V4Z

CANTIGA ES_FCBGA1329 JAL90GM@

2

within 100mil to Ball A9,B9

A

A

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc. SCHEMATIC,LA-4201P
Document Number Rev I Sheet
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2

401551
Monday, July 21, 2008 7 of 50

Date:

5

4

3

2

1

U31B M36 N36 R33 T33 AH9 AH10 AH12 AH13 K12 AL34 AK34 AN35 AM35 T24 RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 SA_CK_0 SA_CK_1 SB_CK_0 SB_CK_1 SA_CK#_0 SA_CK#_1 SB_CK#_0 SB_CK#_1 SA_CKE_0 SA_CKE_1 SB_CKE_0 SB_CKE_1 SA_CS#_0 SA_CS#_1 SB_CS#_0 SB_CS#_1 SA_ODT_0 SA_ODT_1 SB_ODT_O SB_ODT_1 SM_RCOMP SM_RCOMP# SM_RCOMP_VOH SM_RCOMP_VOL SM_VREF SM_PWROK SM_REXT SM_DRAMRST# DPLL_REF_CLK DPLL_REF_CLK# DPLL_REF_SSCLK DPLL_REF_SSCLK# PEG_CLK PEG_CLK# AP24 AT21 AV24 AU20 AR24 AR21 AU24 AV20 BC28 AY28 AY36 BB36 BA17 AY16 AV16 AR13 BD17 AY17 BF15 AY13 BG22 BH21 BF28 BH28 AV42 AR36 BF17 BC36 B38 A38 E41 F41 F43 E43 SMRCOMP SMRCOMP# SM_RCOMP_VOH SM_RCOMP_VOL SM_PWROK SM_REXT R125 1 R375 1 SM_VREF 2 0_0402_5% 2 499_0402_1% DDRA_CLK0 DDRA_CLK1 DDRB_CLK0 DDRB_CLK1 DDRA_CLK0# DDRA_CLK1# DDRB_CLK0# DDRB_CLK1# DDRA_CKE0 DDRA_CKE1 DDRB_CKE0 DDRB_CKE1 DDRA_SCS0# DDRA_SCS1# DDRB_SCS0# DDRB_SCS1# DDRA_ODT0 DDRA_ODT1 DDRB_ODT0 DDRB_ODT1 R386 1 R383 1 14 14 15 15 14 14 15 15 14 14 15 15 14 14 15 15 14 14 15 15

+1.8V 1 R392 1K_0402_1% 2 SM_RCOMP_VOH C491 1 1 C492 0.01U_0402_16V7K
D

COMPENSATION

R390

D

All RSVD balls on GMCH should be left No Connect.
B31 B2 M1 AY21

SM_DRAMRST# would be needed for DDR3 only For Cantiga 80 Ohm

2.2U_0603_6.3V6K 2 3.01K_0402_1% 2

1

2

SM_RCOMP_VOL 1 R389 1K_0402_1% +1.8V +1.8V 2 2 C483 1 1 C482 0.01U_0402_16V7K

DDR CLK/ CONTROL/

RSVD15 RSVD16 RSVD17 RSVD20

RSVD RSVD

2.2U_0603_6.3V6K 2

2

BG23 BF23 BH18 BF18

RSVD22 RSVD23 RSVD24 RSVD25

2 80.6_0402_1% 2 80.6_0402_1%

R146 1K_0402_1% @ 1 1 R147 0_0402_5% R145 1K_0402_1% @ 2 +DIMM_VREF CLK_DREF_96M CLK_DREF_96M# CLK_DREF_SSC CLK_DREF_SSC# R483 1 R482 1 R481 1 R480 1 PM@ 0_0402_5% 2 PM@ 0_0402_5% 2 PM@ 0_0402_5% 2 PM@ 0_0402_5% 2

20mil
C212 1

CLK_DREF_96M CLK_DREF_96M# CLK_DREF_SSC CLK_DREF_SSC# CLK_MCH_3GPLL CLK_MCH_3GPLL#

CLK

CLK_DREF_96M 16 CLK_DREF_96M# 16 CLK_DREF_SSC 16 CLK_DREF_SSC# 16 CLK_MCH_3GPLL 16 CLK_MCH_3GPLL# 16

0.1U_0402_16V4Z 2 1

2

as close as possible to the related balls

C

Strap Pin Table
CFG[2:0] CFG5 CFG6 CFG9 CFG10 CFG[13:12]
011 = FSB667 010 = FSB800 000 = FSB1067

C

DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3 16 MCH_CLKSEL0 16 MCH_CLKSEL1 16 MCH_CLKSEL2 +3VS 1 R118 1 R121 1 R126 2 PM_EXTTS#0 10K_0402_5% 2 PM_EXTTS#1 10K_0402_5% 2 MCH_CLKREQ# 10K_0402_5% MCH_CLKSEL0 MCH_CLKSEL1 MCH_CLKSEL2 MCH_CFG_5 MCH_CFG_6 MCH_CFG_7 MCH_CFG_9 MCH_CFG_10 MCH_CFG_12 MCH_CFG_13 MCH_CFG_16 MCH_CFG_19 MCH_CFG_20
B

AE41 AE37 AE47 AH39 AE40 AE38 AE48 AH40 AE35 AE43 AE46 AH42 AD35 AE44 AF46 AH43

DMI_ITX_MRX_N0 DMI_ITX_MRX_N1 DMI_ITX_MRX_N2 DMI_ITX_MRX_N3 DMI_ITX_MRX_P0 DMI_ITX_MRX_P1 DMI_ITX_MRX_P2 DMI_ITX_MRX_P3 DMI_MTX_IRX_N0 DMI_MTX_IRX_N1 DMI_MTX_IRX_N2 DMI_MTX_IRX_N3 DMI_MTX_IRX_P0 DMI_MTX_IRX_P1 DMI_MTX_IRX_P2 DMI_MTX_IRX_P3

DMI_ITX_MRX_N0 DMI_ITX_MRX_N1 DMI_ITX_MRX_N2 DMI_ITX_MRX_N3 DMI_ITX_MRX_P0 DMI_ITX_MRX_P1 DMI_ITX_MRX_P2 DMI_ITX_MRX_P3 DMI_MTX_IRX_N0 DMI_MTX_IRX_N1 DMI_MTX_IRX_N2 DMI_MTX_IRX_N3 DMI_MTX_IRX_P0 DMI_MTX_IRX_P1 DMI_MTX_IRX_P2 DMI_MTX_IRX_P3

23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23

Use VGATE for GMCH_PWROK
16,23,46 VGATE 23 ICH_PWROK 1 R143 ICH_PWROK 1 R144 VGATE GMCH_PWROK 2 @ 0_0402_5% 2 0_0402_5%

GRAPHICS VID

T25 R25 P25 P20 P24 C25 N24 M24 E21 C23 C24 N21 P21 T21 R20 M20 L21 H21 P29 R28 T28

CFG_0 CFG_1 CFG_2 CFG_3 CFG_4 CFG_5 CFG_6 CFG_7 CFG_8 CFG_9 CFG_10 CFG_11 CFG_12 CFG_13 CFG_14 CFG_15 CFG_16 CFG_17 CFG_18 CFG_19 CFG_20

DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3

0 = DMI x 2 1 = DMI x 4

* (Default) *(Default)

0 = iTPM Host Interface is enabled

DMI

DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3 DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3

1 = iTPM Host Interface is Disabled 0 = Lane Reversal Enable 1 = Normal Operation * (Default)
0 = PCIe Loopback Enable 1 = Disable * (Default) 00 01 10 11 = Reserved = XOR Mode Enabled = All Z Mode Enabled = Normal Operation *

CFG CFG

(Default)

CFG16 CFG19
GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4 B33 B32 G33 F33 E33

CFG20 (PCIE/SDVO select) SDVO_CTRLDATA

23 PM_SYNC# 5,22,46 H_DPRSTP# 14 PM_EXTTS#0 15 PM_EXTTS#1 21,23,26,27,31 PLT_RST# 4,22 H_THERMTRIP# 23,46 PM_DPRSLPVR

R82 R73

1 1

R75 R85 R80

1 1 1

PM_SYNC#_R PM_DPRSTP#_R PM_EXTTS#0 PM_EXTTS#1 GMCH_PWROK 2 100_0402_5% MCH_RSTIN# THERMTRIP#_R 2 0_0402_5% DPRSLPVR_R 0_0402_5% 2 2 0_0402_5% 2 0_0402_5%

R29 B7 N33 P32 AT40 AT11 T20 R32 BG48 BF48 BD48 BC48 BH47 BG47 BE47 BH46 BF46 BG45 BH44 BH43 BH6 BH5 BG4 BH3 BF3 BH2 BG2 BE2 BG1 BF1 BD1 BC1 F1 A47

0 = Dynamic ODT Disabled 1 = Dynamic ODT Enabled * (Default) 0 = Normal Operation *(Default) 1 = DMI Lane Reversal Enable 0 = Only PCIE or SDVO is operational. * (Default) 1 = PCIE/SDVO are operating simu. 0 = No SDVO Card Present * (Default) 1 = SDVO Card Present 0 = LFP Disable * (Default) 1 = LFP Card Present; PCIE disable
0 = Digital DisplayPort Disable * (Default) 1 = Digital DisplayPort Device Present

B

PM_SYNC# PM_DPRSTP# PM_EXT_TS#_0 PM_EXT_TS#_1 PWROK RSTIN# THERMTRIP# DPRSLPVR NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 NC_7 NC_8 NC_9 NC_10 NC_11 NC_12 NC_13 NC_14 NC_15 NC_16 NC_17 NC_18 NC_19 NC_20 NC_21 NC_22 NC_23 NC_24 NC_25 NC_26

2

ME

CL_VREF

1

2

PM PM NC NC

GFX_VR_EN

C34 +1.05VS

L_DDC_DATA DDPC_CTRLDATA

CL_CLK CL_DATA CL_PWROK CL_RST# CL_VREF DDPC_CTRLCLK DDPC_CTRLDATA SDVO_CTRLCLK SDVO_CTRLDATA CLKREQ# ICH_SYNC# TSATN#

AH37 AH36 AN36 AJ35 AH34 N28 M28 G36 E36 K36 H36 B12

ICH_PWROK

CL_CLK0 23 CL_DATA0 23 CL_RST#0 23

R128 1K_0402_1% MCH_CFG_5 MCH_CFG_6 R129 511_0402_1% 1 MCH_CFG_7 MCH_CFG_9 0.1U_0402_16V4Z 2 MCH_CFG_10 MCH_CFG_12 MCH_CFG_13 MCH_CFG_16 2 R110 2 R86 2 R92 2 R103 2 R98 2 R89 2 R90 2 R88 1 @ 2.21K_0402_1% 1 @ 4.02K_0402_1% 1 @ 2.21K_0402_1% 1 @ 2.21K_0402_1% 1 @ 2.21K_0402_1% 1 @ 2.21K_0402_1% 1 @ 2.21K_0402_1% 1 @ 2.21K_0402_1%
A

C198 1 SDVO_SCLK SDVO_SDATA MCH_CLKREQ# SDVO_SCLK 17 SDVO_SDATA 17 MCH_CLKREQ# 16 MCH_ICH_SYNC# 23

+3VS +3VS +1.05VS 1 1 1

R210 1K_0402_5% R202 1K_0402_5% 2

MISC

MCH_TSATN#

MCH_TSATN_EC# 31 1 C Q21 MMBT3904_SOT23-3

A

R371 54.9_0402_1% R366 2 MCH_TSATN# 1 2 2 B

1

2 B 3 E

3

330_0402_5%

E

Q18 MMBT3904_SOT23-3

HDA

C

HDA_BCLK HDA_RST# HDA_SDI HDA_SDO HDA_SYNC

B28 B30 B29 C29 A28

HDA_BITCLK_MCH HDA_RST_MCH# HDA_SDIN2_MCH HDA_SDOUT_MCH HDA_SYNC_MCH

HDA_BITCLK_MCH 22 HDA_RST_MCH# 22

2

1 2 33_0402_5% HDA_SDOUT_MCH 22 R102 JAL90GM@ HDA_SYNC_MCH 22

HDA_SDIN2 22

MCH_CFG_19 R96 MCH_CFG_20 R95

2 2

Notice: Please check HDA power rail to select HDA controller. Security Classification Issued Date 2007/09/20

1 @ 4.02K_0402_1% 1 @ 4.02K_0402_1%

+3VS

CANTIGA ES_FCBGA1329 JAL90GM@

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc. SCHEMATIC,LA-4201P
Rev I Sheet
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

401551

Date:

Monday, July 21, 2008

8

of

50

5

4

3

2

5

4

3

2

1

14 DDRA_SDQ[0..63] 14 DDRA_SDM[0..7]
D

DDRA_SDQ[0..63] DDRA_SDM[0..7] DDRA_SMA[0..14]

15 DDRB_SDQ[0..63] 15 DDRB_SDM[0..7] 15 DDRB_SMA[0..14]

DDRB_SDQ[0..63] DDRB_SDM[0..7] DDRB_SMA[0..14]
D

14 DDRA_SMA[0..14]

U31D DDRA_SDQ0 DDRA_SDQ1 DDRA_SDQ2 DDRA_SDQ3 DDRA_SDQ4 DDRA_SDQ5 DDRA_SDQ6 DDRA_SDQ7 DDRA_SDQ8 DDRA_SDQ9 DDRA_SDQ10 DDRA_SDQ11 DDRA_SDQ12 DDRA_SDQ13 DDRA_SDQ14 DDRA_SDQ15 DDRA_SDQ16 DDRA_SDQ17 DDRA_SDQ18 DDRA_SDQ19 DDRA_SDQ20 DDRA_SDQ21 DDRA_SDQ22 DDRA_SDQ23 DDRA_SDQ24 DDRA_SDQ25 DDRA_SDQ26 DDRA_SDQ27 DDRA_SDQ28 DDRA_SDQ29 DDRA_SDQ30 DDRA_SDQ31 DDRA_SDQ32 DDRA_SDQ33 DDRA_SDQ34 DDRA_SDQ35 DDRA_SDQ36 DDRA_SDQ37 DDRA_SDQ38 DDRA_SDQ39 DDRA_SDQ40 DDRA_SDQ41 DDRA_SDQ42 DDRA_SDQ43 DDRA_SDQ44 DDRA_SDQ45 DDRA_SDQ46 DDRA_SDQ47 DDRA_SDQ48 DDRA_SDQ49 DDRA_SDQ50 DDRA_SDQ51 DDRA_SDQ52 DDRA_SDQ53 DDRA_SDQ54 DDRA_SDQ55 DDRA_SDQ56 DDRA_SDQ57 DDRA_SDQ58 DDRA_SDQ59 DDRA_SDQ60 DDRA_SDQ61 DDRA_SDQ62 DDRA_SDQ63

U31E

C

B

AJ38 AJ41 AN38 AM38 AJ36 AJ40 AM44 AM42 AN43 AN44 AU40 AT38 AN41 AN39 AU44 AU42 AV39 AY44 BA40 BD43 AV41 AY43 BB41 BC40 AY37 BD38 AV37 AT36 AY38 BB38 AV36 AW36 BD13 AU11 BC11 BA12 AU13 AV13 BD12 BC12 BB9 BA9 AU10 AV9 BA11 BD9 AY8 BA6 AV5 AV7 AT9 AN8 AU5 AU6 AT5 AN10 AM11 AM5 AJ9 AJ8 AN12 AM13 AJ11 AJ12

SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63

SA_BS_0 SA_BS_1 SA_BS_2 SA_RAS# SA_CAS# SA_WE#

BD21 BG18 AT25 BB20 BD20 AY20

DDRA_SBS0# 14 DDRA_SBS1# 14 DDRA_SBS2# 14 DDRA_SRAS# 14 DDRA_SCAS# 14 DDRA_SWE# 14

A

MEMORY

SYSTEM

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8 SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14

BA21 BC24 BG24 BH24 BG25 BA24 BD24 BG27 BF25 AW24 BC21 BG26 BH26 BH17 AY25

DDRA_SMA0 DDRA_SMA1 DDRA_SMA2 DDRA_SMA3 DDRA_SMA4 DDRA_SMA5 DDRA_SMA6 DDRA_SMA7 DDRA_SMA8 DDRA_SMA9 DDRA_SMA10 DDRA_SMA11 DDRA_SMA12 DDRA_SMA13 DDRA_SMA14

SYSTEM

SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7

AJ43 AT43 BA44 BD37 AY12 BD8 AU9 AM8

DDRA_SDQS0# DDRA_SDQS1# DDRA_SDQS2# DDRA_SDQS3# DDRA_SDQS4# DDRA_SDQS5# DDRA_SDQS6# DDRA_SDQS7#

DDRA_SDQS0# DDRA_SDQS1# DDRA_SDQS2# DDRA_SDQS3# DDRA_SDQS4# DDRA_SDQS5# DDRA_SDQS6# DDRA_SDQS7#

14 14 14 14 14 14 14 14

MEMORY

SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6 SA_DQS_7

AJ44 AT44 BA43 BC37 AW12 BC8 AU8 AM7

DDRA_SDQS0 DDRA_SDQS1 DDRA_SDQS2 DDRA_SDQS3 DDRA_SDQS4 DDRA_SDQS5 DDRA_SDQS6 DDRA_SDQS7

DDRA_SDQS0 DDRA_SDQS1 DDRA_SDQS2 DDRA_SDQS3 DDRA_SDQS4 DDRA_SDQS5 DDRA_SDQS6 DDRA_SDQS7

14 14 14 14 14 14 14 14

B

SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7

AM37 AT41 AY41 AU39 BB12 AY6 AT7 AJ5

DDRA_SDM0 DDRA_SDM1 DDRA_SDM2 DDRA_SDM3 DDRA_SDM4 DDRA_SDM5 DDRA_SDM6 DDRA_SDM7

DDRB_SDQ0 DDRB_SDQ1 DDRB_SDQ2 DDRB_SDQ3 DDRB_SDQ4 DDRB_SDQ5 DDRB_SDQ6 DDRB_SDQ7 DDRB_SDQ8 DDRB_SDQ9 DDRB_SDQ10 DDRB_SDQ11 DDRB_SDQ12 DDRB_SDQ13 DDRB_SDQ14 DDRB_SDQ15 DDRB_SDQ16 DDRB_SDQ17 DDRB_SDQ18 DDRB_SDQ19 DDRB_SDQ20 DDRB_SDQ21 DDRB_SDQ22 DDRB_SDQ23 DDRB_SDQ24 DDRB_SDQ25 DDRB_SDQ26 DDRB_SDQ27 DDRB_SDQ28 DDRB_SDQ29 DDRB_SDQ30 DDRB_SDQ31 DDRB_SDQ32 DDRB_SDQ33 DDRB_SDQ34 DDRB_SDQ35 DDRB_SDQ36 DDRB_SDQ37 DDRB_SDQ38 DDRB_SDQ39 DDRB_SDQ40 DDRB_SDQ41 DDRB_SDQ42 DDRB_SDQ43 DDRB_SDQ44 DDRB_SDQ45 DDRB_SDQ46 DDRB_SDQ47 DDRB_SDQ48 DDRB_SDQ49 DDRB_SDQ50 DDRB_SDQ51 DDRB_SDQ52 DDRB_SDQ53 DDRB_SDQ54 DDRB_SDQ55 DDRB_SDQ56 DDRB_SDQ57 DDRB_SDQ58 DDRB_SDQ59 DDRB_SDQ60 DDRB_SDQ61 DDRB_SDQ62 DDRB_SDQ63

AK47 AH46 AP47 AP46 AJ46 AJ48 AM48 AP48 AU47 AU46 BA48 AY48 AT47 AR47 BA47 BC47 BC46 BC44 BG43 BF43 BE45 BC41 BF40 BF41 BG38 BF38 BH35 BG35 BH40 BG39 BG34 BH34 BH14 BG12 BH11 BG8 BH12 BF11 BF8 BG7 BC5 BC6 AY3 AY1 BF6 BF5 BA1 BD3 AV2 AU3 AR3 AN2 AY2 AV1 AP3 AR1 AL1 AL2 AJ1 AH1 AM2 AM3 AH3 AJ3

SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63

SB_BS_0 SB_BS_1 SB_BS_2 SB_RAS# SB_CAS# SB_WE#

BC16 BB17 BB33 AU17 BG16 BF14

DDRB_SBS0# 15 DDRB_SBS1# 15 DDRB_SBS2# 15 DDRB_SRAS# 15 DDRB_SCAS# 15 DDRB_SWE# 15

SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7 SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6 SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7 SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8 SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14

AM47 AY47 BD40 BF35 BG11 BA3 AP1 AK2 AL47 AV48 BG41 BG37 BH9 BB2 AU1 AN6 AL46 AV47 BH41 BH37 BG9 BC2 AT2 AN5 AV17 BA25 BC25 AU25 AW25 BB28 AU28 AW28 AT33 BD33 BB16 AW33 AY33 BH15 AU33

DDRB_SDM0 DDRB_SDM1 DDRB_SDM2 DDRB_SDM3 DDRB_SDM4 DDRB_SDM5 DDRB_SDM6 DDRB_SDM7 DDRB_SDQS0 DDRB_SDQS1 DDRB_SDQS2 DDRB_SDQS3 DDRB_SDQS4 DDRB_SDQS5 DDRB_SDQS6 DDRB_SDQS7 DDRB_SDQS0# DDRB_SDQS1# DDRB_SDQS2# DDRB_SDQS3# DDRB_SDQS4# DDRB_SDQS5# DDRB_SDQS6# DDRB_SDQS7# DDRB_SMA0 DDRB_SMA1 DDRB_SMA2 DDRB_SMA3 DDRB_SMA4 DDRB_SMA5 DDRB_SMA6 DDRB_SMA7 DDRB_SMA8 DDRB_SMA9 DDRB_SMA10 DDRB_SMA11 DDRB_SMA12 DDRB_SMA13 DDRB_SMA14

C

DDRB_SDQS0 DDRB_SDQS1 DDRB_SDQS2 DDRB_SDQS3 DDRB_SDQS4 DDRB_SDQS5 DDRB_SDQS6 DDRB_SDQS7 DDRB_SDQS0# DDRB_SDQS1# DDRB_SDQS2# DDRB_SDQS3# DDRB_SDQS4# DDRB_SDQS5# DDRB_SDQS6# DDRB_SDQS7#

15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15

DDR

DDR

B

CANTIGA ES_FCBGA1329 JAL90GM@

CANTIGA ES_FCBGA1329 JAL90GM@

A

A

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc. SCHEMATIC,LA-4201P
Document Number Rev I Sheet
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2

401551
Monday, July 21, 2008 9 of 50

Date:

5

4

3

2

1

U31C 18 DPST_PWM 1 2 R117 GM@ 0_0402_5% 18 GMCH_LCD_CLK 18 GMCH_LCD_DATA 18 GMCH_ENVDD R402 LBKLT_EN LCTLA_CLK LCTLB_DATA GMCH_LCD_CLK GMCH_LCD_DATA

17,31 ENBKL

D

L32 G32 M32 M33 K33 J33 M29 C44 B43 E37 E38 C41 C40 B37 A37 H47 E46 G40 A40 H48 D45 F40 B40 A41 H38 G37 J37 B42 G38 F37 K37

L_BKLT_CTRL L_BKLT_EN L_CTRL_CLK L_CTRL_DATA L_DDC_CLK L_DDC_DATA L_VDD_EN LVDS_IBG LVDS_VBG LVDS_VREFH LVDS_VREFL LVDSA_CLK# LVDSA_CLK LVDSB_CLK# LVDSB_CLK LVDSA_DATA#_0 LVDSA_DATA#_1 LVDSA_DATA#_2 LVDSA_DATA#_3 LVDSA_DATA_0 LVDSA_DATA_1 LVDSA_DATA_2 LVDSA_DATA_3 LVDSB_DATA#_0 LVDSB_DATA#_1 LVDSB_DATA#_2 LVDSB_DATA#_3 LVDSB_DATA_0 LVDSB_DATA_1 LVDSB_DATA_2 LVDSB_DATA_3

PEG_COMPI PEG_COMPO PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8 PEG_RX#_9 PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15 PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8 PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15 PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8 PEG_TX#_9 PEG_TX#_10 PEG_TX#_11 PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15 PEG_TX_0 PEG_TX_1 PEG_TX_2 PEG_TX_3 PEG_TX_4 PEG_TX_5 PEG_TX_6 PEG_TX_7 PEG_TX_8 PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15

T37 T36 H44 J46 L44 L40 N41 P48 N44 T43 U43 Y43 Y48 Y36 AA43 AD37 AC47 AD39 H43 J44 L43 L41 N40 P47 N43 T42 U42 Y42 W47 Y37 AA42 AD36 AC48 AD40 J41 M46 M47 M40 M42 R48 N38 T40 U37 U40 Y40 AA46 AA37 AA40 AD43 AC46 J42 L46 M48 M39 M43 R47 N37 T39 U36 U39 Y39 Y46 AA36 AA39 AD42 AD46

PEG_COMP

10mils

1 R130

2

49.9_0402_1%

+1.05VS

1

GM@

2

18 18 18 18

GMCH_TXCLKGMCH_TXCLK+ GMCH_TZCLKGMCH_TZCLK+

LVDS_IBG 2.37K_0402_1% 2 1 R517 GM@ 0_0402_5% GMCH_TXCLKGMCH_TXCLK+ GMCH_TZCLKGMCH_TZCLK+ GMCH_TXOUT0GMCH_TXOUT1GMCH_TXOUT2GMCH_TXOUT0+ GMCH_TXOUT1+ GMCH_TXOUT2+ GMCH_TZOUT0GMCH_TZOUT1GMCH_TZOUT2GMCH_TZOUT0+ GMCH_TZOUT1+ GMCH_TZOUT2+

18 GMCH_TXOUT018 GMCH_TXOUT118 GMCH_TXOUT218 GMCH_TXOUT0+ 18 GMCH_TXOUT1+ 18 GMCH_TXOUT2+ 18 GMCH_TZOUT018 GMCH_TZOUT118 GMCH_TZOUT218 GMCH_TZOUT0+ 18 GMCH_TZOUT1+ 18 GMCH_TZOUT2+

PCIE_GTX_C_MRX_N0 PCIE_GTX_C_MRX_N1 PCIE_GTX_C_MRX_N2 PCIE_GTX_C_MRX_N3 PCIE_GTX_C_MRX_N4 PCIE_GTX_C_MRX_N5 PCIE_GTX_C_MRX_N6 PCIE_GTX_C_MRX_N7 PCIE_GTX_C_MRX_N8 PCIE_GTX_C_MRX_N9 PCIE_GTX_C_MRX_N10 PCIE_GTX_C_MRX_N11 PCIE_GTX_C_MRX_N12 PCIE_GTX_C_MRX_N13 PCIE_GTX_C_MRX_N14 PCIE_GTX_C_MRX_N15 PCIE_GTX_C_MRX_P0 PCIE_GTX_C_MRX_P1 PCIE_GTX_C_MRX_P2 PCIE_GTX_C_MRX_P3 PCIE_GTX_C_MRX_P4 PCIE_GTX_C_MRX_P5 PCIE_GTX_C_MRX_P6 PCIE_GTX_C_MRX_P7 PCIE_GTX_C_MRX_P8 PCIE_GTX_C_MRX_P9 PCIE_GTX_C_MRX_P10 PCIE_GTX_C_MRX_P11 PCIE_GTX_C_MRX_P12 PCIE_GTX_C_MRX_P13 PCIE_GTX_C_MRX_P14 PCIE_GTX_C_MRX_P15 PCIE_MTX_GRX_N0 PCIE_MTX_GRX_N1 PCIE_MTX_GRX_N2 PCIE_MTX_GRX_N3 PCIE_MTX_GRX_N4 PCIE_MTX_GRX_N5 PCIE_MTX_GRX_N6 PCIE_MTX_GRX_N7 PCIE_MTX_GRX_N8 PCIE_MTX_GRX_N9 PCIE_MTX_GRX_N10 PCIE_MTX_GRX_N11 PCIE_MTX_GRX_N12 PCIE_MTX_GRX_N13 PCIE_MTX_GRX_N14 PCIE_MTX_GRX_N15 PCIE_MTX_GRX_P0 PCIE_MTX_GRX_P1 PCIE_MTX_GRX_P2 PCIE_MTX_GRX_P3 PCIE_MTX_GRX_P4 PCIE_MTX_GRX_P5 PCIE_MTX_GRX_P6 PCIE_MTX_GRX_P7 PCIE_MTX_GRX_P8 PCIE_MTX_GRX_P9 PCIE_MTX_GRX_P10 PCIE_MTX_GRX_P11 PCIE_MTX_GRX_P12 PCIE_MTX_GRX_P13 PCIE_MTX_GRX_P14 PCIE_MTX_GRX_P15 C218 1 C228 1 C234 1 C242 1 C251 1 C257 1 C244 1 C252 1 C215 1 C223 1 C232 1 C238 1 C246 1 C253 1 C241 1 C248 1

PCIE_MTX_C_GRX_N[0..15] PCIE_MTX_C_GRX_P[0..15] PCIE_GTX_C_MRX_N[0..15] PCIE_GTX_C_MRX_P[0..15]

PCIE_MTX_C_GRX_N[0..15] 17 PCIE_MTX_C_GRX_P[0..15] 17 PCIE_GTX_C_MRX_N[0..15] 17 PCIE_GTX_C_MRX_P[0..15] 17

D

C

GRAPHICS

PCI-EXPRESS

LVDS

C

GMCH_TV_COMPS GMCH_TV_LUMA GMCH_TV_CRMA

F25 H25 K25 H24

TVA_DAC TVB_DAC TVC_DAC

R104

R105

R93 TV_DCONSEL_0 TV_DCONSEL_1

TV_RTN

GM@ GM@ GM@ 75_0402_1% 75_0402_1% 75_0402_1%

C31 E32

TV_DCONSEL_0 TV_DCONSEL_1

C210 2 PM@ 0.1U_0402_16V7K C222 2 PM@ 0.1U_0402_16V7K C231 2 PM@ 0.1U_0402_16V7K C237 2 PM@ 0.1U_0402_16V7K C243 2 PM@ 0.1U_0402_16V7K C250 2 PM@ 0.1U_0402_16V7K C249 2 PM@ 0.1U_0402_16V7K C256 2 PM@ 0.1U_0402_16V7K C208 2 PM@ 0.1U_0402_16V7K C220 PM@ 0.1U_0402_16V7K 2 C229 2 PM@ 0.1U_0402_16V7K C235 PM@ 0.1U_0402_16V7K 2 C239 2 PM@ 0.1U_0402_16V7K C245 2 PM@ 0.1U_0402_16V7K C247 2 PM@ 0.1U_0402_16V7K C255 2 PM@ 0.1U_0402_16V7K

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

2 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_N1 2 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_N3 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N4 2 PCIE_MTX_C_GRX_N5 2 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_N7 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N8 2 PCIE_MTX_C_GRX_N9 2 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_N11 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N12 2 PCIE_MTX_C_GRX_N13 2 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_N15 2 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P0 PCIE_MTX_C_GRX_P1 2 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P2 PCIE_MTX_C_GRX_P3 2 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P4 PCIE_MTX_C_GRX_P5 2 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P6 PCIE_MTX_C_GRX_P7 2 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P8 PCIE_MTX_C_GRX_P9 2 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P10 PCIE_MTX_C_GRX_P11 2 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_P13 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P14 2 PCIE_MTX_C_GRX_P15

2

2

2

TV

1

1

Change to 0Ohm when use PM chip
19 GMCH_CRT_B 19 GMCH_CRT_G 19 GMCH_CRT_R
B

1

E28 G28 J28 G29
GMCH_CRT_CLK GMCH_CRT_DATA CRT_IREF

2 R114 2 R115 2 R116

1 GM@ 150_0402_1% 1 GM@ 150_0402_1% 1 GM@ 150_0402_1%
19 GMCH_CRT_CLK 19 GMCH_CRT_DATA

CRT_BLUE CRT_GREEN

VGA

CRT_RED CRT_IRTN CRT_DDC_CLK CRT_DDC_DATA CRT_HSYNC CRT_TVO_IREF CRT_VSYNC

B

19 GMCH_CRT_HSYNC

2 R107

1 PM@ 0_0402_5%

H32 J32 J29 E29 L29

19 GMCH_CRT_VSYNC +3VS

2

2 R101

1 PM@ 0_0402_5%

R123 1 GM@ R122 1 GM@ R127 1 GM@ R120 1 GM@ R108 1 GM@ R100 1 GM@

2 2.2K_0402_5% 2 2.2K_0402_5% 2 10K_0402_5% 2 10K_0402_5% 2 2.2K_0402_5% 2 2.2K_0402_5%

GMCH_LCD_CLK

LCTLB_DATA LCTLA_CLK GMCH_CRT_CLK GMCH_CRT_DATA

A

1

GMCH_LCD_DATA

R119 1.02K_0402_1% GM@

CANTIGA ES_FCBGA1329 JAL90GM@

A

R124 R109 R112 1

GM@ GM@

0_0402_5% 0_0402_5%

TV_DCONSEL_0 TV_DCONSEL_1 LBKLT_EN

2 100K_0402_5%

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc. SCHEMATIC,LA-4201P
Rev I Sheet
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

401551

Date:

Monday, July 21, 2008

10

of

50

5

4

3

2

5

4

3

2

1

U31F +1.8V

+VGFX_CORE

2600mA
AP33 AN33 BH32 BG32 BF32 BD32 BC32 BB32 BA32 AY32 AW32 AV32 AU32 AT32 AR32 AP32 AN32 BH31 BG31 BF31 BG30 BH29 BG29 BF29 BD29 BC29 BB29 BA29 AY29 AW29 AV29 AU29 AT29 AR29 AP29 VCC_SM_1 VCC_SM_2 VCC_SM_3 VCC_SM_4 VCC_SM_5 VCC_SM_6 VCC_SM_7 VCC_SM_8 VCC_SM_9 VCC_SM_10 VCC_SM_11 VCC_SM_12 VCC_SM_13 VCC_SM_14 VCC_SM_15 VCC_SM_16 VCC_SM_17 VCC_SM_18 VCC_SM_19 VCC_SM_20 VCC_SM_21 VCC_SM_22 VCC_SM_23 VCC_SM_24 VCC_SM_25 VCC_SM_26 VCC_SM_27 VCC_SM_28 VCC_SM_29 VCC_SM_30 VCC_SM_31 VCC_SM_32 VCC_SM_33 VCC_SM_34 VCC_SM_35

D

Reference PILLAR_ROCK CRB Rev1.0 Pins BA36, BB24, BD16, BB21, AW16, AW13, AT13 could be left NC for DDR2 board.
C

VCC_SM_AW16 VCC_SM_AT13

VCC

VCC_SM_BA36 VCC_SM_BB24 VCC_SM_BD16

BA36 BB24 BD16 BB21 AW16 AW13 AT13

VCC_SM_36/NC VCC_SM_37/NC VCC_SM_38/NC VCC_SM_39/NC VCC_SM_40/NC VCC_SM_41/NC VCC_SM_42/NC

+VGFX_CORE

B

VCC SM LF

Y26 AE25 AB25 AA25 AE24 AC24 AA24 Y24 AE23 AC23 AB23 AA23 AJ21 AG21 AE21 AC21 AA21 Y21 AH20 AF20 AE20 AC20 AB20 AA20 T17 T16 AM15 AL15 AE15 AJ15 AH15 AG15 AF15 AB15 AA15 Y15 V15 U15 AN14 AM14 U14 T14

VCC_AXG_1 VCC_AXG_2 VCC_AXG_3 VCC_AXG_4 VCC_AXG_5 VCC_AXG_6 VCC_AXG_7 VCC_AXG_8 VCC_AXG_9 VCC_AXG_10 VCC_AXG_11 VCC_AXG_12 VCC_AXG_13 VCC_AXG_14 VCC_AXG_15 VCC_AXG_16 VCC_AXG_17 VCC_AXG_18 VCC_AXG_19 VCC_AXG_20 VCC_AXG_21 VCC_AXG_22 VCC_AXG_23 VCC_AXG_24 VCC_AXG_25 VCC_AXG_26 VCC_AXG_27 VCC_AXG_28 VCC_AXG_29 VCC_AXG_30 VCC_AXG_31 VCC_AXG_32 VCC_AXG_33 VCC_AXG_34 VCC_AXG_35 VCC_AXG_36 VCC_AXG_37 VCC_AXG_38 VCC_AXG_39 VCC_AXG_40 VCC_AXG_41 VCC_AXG_42

VCC_AXG_NTCF_1 VCC_AXG_NCTF_2 VCC_AXG_NCTF_3 VCC_AXG_NCTF_4 VCC_AXG_NCTF_5 VCC_AXG_NCTF_6 VCC_AXG_NCTF_7 VCC_AXG_NCTF_8 VCC_AXG_NCTF_9 VCC_AXG_NCTF_10 VCC_AXG_NCTF_11 VCC_AXG_NCTF_12 VCC_AXG_NCTF_13 VCC_AXG_NCTF_14 VCC_AXG_NCTF_15 VCC_AXG_NCTF_16 VCC_AXG_NCTF_17 VCC_AXG_NCTF_18 VCC_AXG_NCTF_19 VCC_AXG_NCTF_20 VCC_AXG_NCTF_21 VCC_AXG_NCTF_22 VCC_AXG_NCTF_23 VCC_AXG_NCTF_24 VCC_AXG_NCTF_25 VCC_AXG_NCTF_26 VCC_AXG_NCTF_27 VCC_AXG_NCTF_28 VCC_AXG_NCTF_29 VCC_AXG_NCTF_30 VCC_AXG_NCTF_31 VCC_AXG_NCTF_32 VCC_AXG_NCTF_33 VCC_AXG_NCTF_34 VCC_AXG_NCTF_35 VCC_AXG_NCTF_36 VCC_AXG_NCTF_37 VCC_AXG_NCTF_38 VCC_AXG_NCTF_39 VCC_AXG_NCTF_40 VCC_AXG_NCTF_41 VCC_AXG_NCTF_42 VCC_AXG_NCTF_43 VCC_AXG_NCTF_44 VCC_AXG_NCTF_45 VCC_AXG_NCTF_46 VCC_AXG_NCTF_47 VCC_AXG_NCTF_48 VCC_AXG_NCTF_49 VCC_AXG_NCTF_50 VCC_AXG_NCTF_51 VCC_AXG_NCTF_52 VCC_AXG_NCTF_53 VCC_AXG_NCTF_54 VCC_AXG_NCTF_55 VCC_AXG_NCTF_56 VCC_AXG_NCTF_57 VCC_AXG_NCTF_58 VCC_AXG_NCTF_59 VCC_AXG_NCTF_60

W28 V28 W26 V26 W25 V25 W24 V24 W23 V23 AM21 AL21 AK21 W21 V21 U21 AM20 AK20 W20 U20 AM19 AL19 AK19 AJ19 AH19 AG19 AF19 AE19 AB19 AA19 Y19 W19 V19 U19 AM17 AK17 AH17 AG17 AF17 AE17 AC17 AB17 Y17 W17 V17 AM16 AL16 AK16 AJ16 AH16 AG16 AF16 AE16 AC16 AB16 AA16 Y16 W16 V16 U16

Place close to the GMCH
+1.05VS

VCC: 1930.4mA (GMCH), 1210.34mA (MCH) (270UF*1, 22UF*1, 0.22UF*2, 0.1UF*1)
+1.05VS 1 C193 C194 C195 1 U31G C192 AG34 AC34 AB34 AA34 Y34 V34 U34 AM33 AK33 AJ33 AG33 AF33 VCC_1 VCC_2 VCC_3 VCC_4 VCC_5 VCC_6 VCC_7 VCC_8 VCC_9 VCC_10 VCC_11 VCC_12

D

1 + C122

GFX NCTF

J2 JUMP_43X79 @

R84 0_0402_5% PM@

Cavity Capacitors

POWER

POWER

+

C190

C191

C196

330U_D2E_2.5VM_R15 10U_0805_10V4Z 2 2 2 2 10U_0805_10V4Z 0.1U_0402_16V4Z

NCTF

Place on the edge Reference PILLAR_ROCK CRB Rev1.0
VCC_SM_BA36 VCC_SM_BB24 VCC_SM_BD16 VCC_SM_AW16 VCC_SM_AT13 1 1 1 1 1 C164 C170 C169 C185 C200 @ @ @ @ @ 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 2 2 2 2 2 0.1U_0402_16V7K 0.1U_0402_16V7K

T10 T9
A

PAD PAD

@ @

VCC_AXG_SENSE VSS_AXG_SENSE

AJ14 AH14

VCC_AXG_SENSE VSS_AXG_SENSE

VCC_SM_LF1 VCC_SM_LF2 VCC_SM_LF3 VCC_SM_LF4 VCC_SM_LF5 VCC_SM_LF6 VCC_SM_LF7

AV44 BA37 AM40 AV21 AY5 AM10 BB13

VCCSM_LF1 VCCSM_LF2 VCCSM_LF3 VCCSM_LF4 VCCSM_LF5 VCCSM_LF6 VCCSM_LF7 1 C165

CANTIGA ES_FCBGA1329 JAL90GM@ C159 1 C158 1 C177 1 C202 1 C199 1 C211 1
A

0.1U_0402_16V7K 0.22U_0402_6.3V6K 0.47U_0603_16V4Z 1U_0402_6.3V4Z 2 2 2 2 2 2 2 0.1U_0402_16V7K 0.22U_0402_6.3V6K 1U_0402_6.3V4Z

CANTIGA ES_FCBGA1329 JAL90GM@

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

VCC

VCC VCC SM SM

220U_D2_4VM_R15 0.22U_0402_6.3V6K 0.1U_0402_16V4Z 2 2 2 10U_0805_10V4Z 0.22U_0402_6.3V6K

Cavity Capacitors

VCC CORE VCC CORE

+1.05VS

J1 JUMP_43X79 @ 1 1 2 2 1 R111 1 1

+VGFX_CORE

VCC_AXG: 6326.84mA (330UF*2, 22UF*1, 10UF*1, 1U*1, 0.47U*1, 0.1UF*2)
C180 C181 C172 1 C174 1 C171 1 C178 1

2 GM@ 0_0805_5% 2 2

GM@ 0.47U_0603_16V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z 2 2 2 GM@ 2 GM@ GM@ 1U_0402_6.3V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z GM@ GM@

C118

1 +

330U_D2E_2.5VM_R15 2 GM@

AE33 AC33 AA33 Y33 W33 V33 U33 AH28 AF28 AC28 AA28 AJ26 AG26 AE26 AC26 AH25 AG25 AF25 AG24 AJ23 AH23 AF23 T32

VCC_13 VCC_14 VCC_15 VCC_16 VCC_17 VCC_18 VCC_19 VCC_20 VCC_21 VCC_22 VCC_23 VCC_24 VCC_25 VCC_26 VCC_27 VCC_28 VCC_29 VCC_30 VCC_31 VCC_32 VCC_33 VCC_34 VCC_35

C

+1.05VS

Place close to the GMCH

+1.8V

VCC_SM: 2600mA (330UF*1, 22UF*2, 0.1UF*1)

C205

1 1 1 1

VCC_NCTF_1 VCC_NCTF_2 VCC_NCTF_3 VCC_NCTF_4 VCC_NCTF_5 VCC_NCTF_6 VCC_NCTF_7 VCC_NCTF_8 VCC_NCTF_9 VCC_NCTF_10 VCC_NCTF_11 VCC_NCTF_12 VCC_NCTF_13 VCC_NCTF_14 VCC_NCTF_15 VCC_NCTF_16 VCC_NCTF_17 VCC_NCTF_18 VCC_NCTF_19 VCC_NCTF_20 VCC_NCTF_21 VCC_NCTF_22 VCC_NCTF_23 VCC_NCTF_24 VCC_NCTF_25 VCC_NCTF_26 VCC_NCTF_27 VCC_NCTF_28 VCC_NCTF_29 VCC_NCTF_30 VCC_NCTF_31 VCC_NCTF_32 VCC_NCTF_33 VCC_NCTF_34 VCC_NCTF_35 VCC_NCTF_36 VCC_NCTF_37 VCC_NCTF_38 VCC_NCTF_39 VCC_NCTF_40 VCC_NCTF_41 VCC_NCTF_42 VCC_NCTF_43 VCC_NCTF_44

AM32 AL32 AK32 AJ32 AH32 AG32 AE32 AC32 AA32 Y32 W32 U32 AM30 AL30 AK30 AH30 AG30 AF30 AE30 AC30 AB30 AA30 Y30 W30 V30 U30 AL29 AK29 AJ29 AH29 AG29 AE29 AC29 AA29 Y29 W29 V29 AL28 AK28 AL26 AK26 AK25 AK24 AK23

B

VCC GFX

Compal Electronics, Inc. SCHEMATIC,LA-4201P
Rev I Sheet
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

401551

Date:

Monday, July 21, 2008

11

of

50

5

4

3

2

5

4

3

2

1

+1.05VS_HPLL +1.05VS_DPLLA +1.05VS L23 1 2 MBK1608121YZF_0603 1 C434 VCCA_HPLL: 24mA 1 1 +1.05VS 1 L32 0_1210_5% GM@ 2

C441

(4.7UF*1, 0.1UF*1)
Please check Power source if want support IAMT
D

2

4.7U_0805_10V4Z 2 2 0.1U_0402_16V4Z +1.05VS_MPLL

CRT

120Ohm@100MHz

Please check Power source if want support IAMT
1

VCCA_DPLLA VCCA_DPLLB: 64.8mA (220UF*1, 0.1UF*1)

1 1 C513 R536 + 0_0402_5% C505 GM@ PM@ GM@ 2 220U_D2_4VM_R15 +3VS_CRTDAC 2 0.1U_0402_16V4Z

U31H

+1.05VS

73mA
B27 A26 VCCA_CRT_DAC_1 VCCA_CRT_DAC_2

852mA
VTT_1 VTT_2 VTT_3 VTT_4 VTT_5 VTT_6 VTT_7 VTT_8 VTT_9 VTT_10 VTT_11 VTT_12 VTT_13 VTT_14 VTT_15 VTT_16 VTT_17 VTT_18 VTT_19 VTT_20 VTT_21 VTT_22 VTT_23 VTT_24 VTT_25 U13 T13 U12 T12 U11 T11 U10 T10 U9 T9 U8 T8 U7 T7 U6 T6 U5 T5 V3 U3 V2 U2 T2 V1 U1 1 C104 +

VTT: 852mA (270UF*1, 4.7UF*2, 2.2UF*1, 0.47UF*1)
1 1 1 1

C127

C116

C100

C108 0.47U_0603_16V4Z
D

1

L5 1 2 MBK1608121YZF_0603

+1.05VS_DPLLB 1 C149 1 L10 0_1210_5% GM@ 2 1 C214 GM@ 1

2.69mA
+3VS_DACBG A25 B25 R537 0_0402_5% PM@ +1.05VS_DPLLA +1.05VS_DPLLB +1.05VS_HPLL VCCA_DAC_BG VSSA_DAC_BG

220U_D2_4VM_R15 4.7U_0805_10V4Z 2 2 2 2 4.7U_0805_10V4Z 2.2U_0603_6.3V6K

2

VCCA_MPLL: 139.2mA (22UF*1, 0.1UF*1)

R335 0.5_0603_1% 2

1 C437 22U_0805_6.3V6M 2 +3VS

C263 2 2 10U_0805_10V4Z GM@ 0.1U_0402_16V4Z 2 R141 @ 0_0402_5% 1 2 R140 0_0402_5% 1 2

F47 L48 AD1 AE1 J48 J47

VCCA_DPLLA VCCA_DPLLB VCCA_HPLL VCCA_MPLL

+1.8V_TX_LVDS 1 C213 GM@ 1000P_0402_50V7K 2 +1.05VS_MPLL

139.2mA

VCCA_LVDS VSSA_LVDS

VCCA_CRT_DAC: 73mA (0.1UF*1, 0.01UF*1)
+3VS

+3VS_CRTDAC

+1.5VS

1 2 L31 GM@ MBK1608301YZF_0603 1 1 C495 C494 1 GM@ GM@ + C606 0.1U_0402_16V4Z 2 2 GM@ 220U_D2_4VM_R15 0.01U_0402_16V7K 2

Please check Power source if want support IAMT
R393 0_0402_5% PM@ +1.05VS

1

C216

0.1U_0402_16V4Z 2

VCCA_PEG_BG: 0.414mA (0.1UF*1)

0.414mA
AD48 VCCA_PEG_BG

A PEG A LVDS

+VCCA_PEG_BG

VCCA_LVDS: 13.2mA (1000PF*1)

13.2mA

PLL

24mA

VTT

2 0.1U_0402_16V4Z

64.8mA

+1.05VS_AXF

Close to Ball A26, B27
C

L8 1 2 MBK1608221YZF_0603 2 1 1 2 C233 R142 10U_0805_6.3V6M 1_0402_1%

No CIS Symbol

50mA
+1.05VS_PEGPLL VCCA_PEG_PLL: 1 C519 AA48 VCCA_PEG_PLL

VCC_AXF: 321.35mA (10UF*1, 1UF*1)

Please check Power source if want support IAMT
+1.05VS

1

50mA 480mA
AR20 AP20 AN20 AR17 AP17 AN17 AT16 AR16 AP16 VCCA_SM_1 VCCA_SM_2 VCCA_SM_3 VCCA_SM_4 VCCA_SM_5 VCCA_SM_6 VCCA_SM_7 VCCA_SM_8 VCCA_SM_9

(0.1UF*1)

2

0.1U_0402_16V4Z

POWER
A SM
B22 B21 A21

+1.05VS_A_SM +1.05VS 1 1 2 R97 0_0805_5%

1 2 R376 0_0603_5% 1 1 C471 C470 @ 10U_0805_6.3V6M 2 2 1U_0402_6.3V4Z +1.8V_SM_CK

2

VCCA_SM: (22UF*2, 4.7UF*1, 1UF*1)
C173 1 C168 1 C176 1 4.7U_0805_10V4Z 2 2 2 22U_0805_6.3V6M 1U_0402_6.3V4Z

C

Please check Power source if want support IAMT

+ C435 @ 220U_D2_4VM_R15 2

AXF

VCC_AXF_1 VCC_AXF_2 VCC_AXF_3

VCC_SM_CK: 119.85mA (10UF*1, 0.1UF*1) 1uH 30%
1 2 +1.8V L28 MBK1608121YZF_0603

1

C466 0.1U_0402_16V4Z 1 2 1 2 R377 C167 1_0402_1% 10U_0805_6.3V6M

VCCA_DAC_BG: 2.6833333mA (0.1UF*1, 0.01UF*1)
+3VS 1 2

+1.05VS_A_SM_CK

+3VS_DACBG +1.05VS 1 1 2 R106 0_0603_5% 1

VCCA_SM_CK: 24mA (22UF*1, 2.2UF*1, 0.1UF*1)

24mA
AP28 AN28 AP25 AN25 AN24 AM28 AM26 AM25 AL25 AM24 AL24 AM23 AL23 VCCA_SM_CK_1 VCCA_SM_CK_2 VCCA_SM_CK_3 VCCA_SM_CK_4 VCCA_SM_CK_5 VCCA_SM_CK_NCTF_1 VCCA_SM_CK_NCTF_2 VCCA_SM_CK_NCTF_3 VCCA_SM_CK_NCTF_4 VCCA_SM_CK_NCTF_5 VCCA_SM_CK_NCTF_6 VCCA_SM_CK_NCTF_7 VCCA_SM_CK_NCTF_8

SM CK

Please check Power source if want support IAMT

VCC_SM_CK_1 VCC_SM_CK_2 VCC_SM_CK_3 VCC_SM_CK_4

BF21 BH20 BG20 BF20

2

A CK

HV

Close to Ball A25

VCC_HV_1 VCC_HV_2 VCC_HV_3

1

C197 0.1U_0402_16V4Z

2

L30 GM@ MBK1608221YZF_0603 1 1 1 C489 C488 C486 GM@ @ GM@ 0.1U_0402_16V4Z 10U_0805_6.3V6M 2 2 2 0.01U_0402_16V7K

R391 0_0402_5% PM@ 2

1 1 C182 C189 C186 @ 2.2U_0603_6.3V6K 0.1U_0402_16V4Z 2 2 2 22U_0805_6.3V6M

+1.8V_TX_LVDS: 118.8mA (22UF*1, 1000PF*1)
K47 R175 PM@ 0_0402_5% 1 1

+1.8V_TX_LVDS

0.1uH 20%
+1.8V

118.8mA
VCC_TX_LVDS

NO_STUFF

105.3mA
C35 B35 A35

VCC_HV: 105.3mA
+3VS

1 2 R178 1 C261 C265 0_0603_5% GM@ GM@ GM@ 1000P_0402_50V7K 2 2 10U_0805_10V4Z

1782mA
VCC_PEG_1 VCC_PEG_2 VCC_PEG_3 VCC_PEG_4 VCC_PEG_5 V48 U48 V47 U47 U46

2

B

VCCA_TV_DAC: 40mA (0.1UF*1, 0.01UF*1 for each DAC)
+3VS_TVDAC +3VS L29 1 2 MBK1608221YZF_0603 1 1 C478 C477 GM@ GM@ 0.1U_0402_16V4Z 2 2 0.01U_0402_16V7K

PEG

+1.05VS_PEG: 1782mA +1.05VS_PEG (220UF*1, 22UF*1, 4.7UF*1)
1 1 C236 + C258 2

Please check Power source if want support IAMT
1 R174 0_0805_5% 2 +1.05VS
B

87.79mA
+3VS_TVDAC

TV

B24 A24

VCCA_TV_DAC_1 VCCA_TV_DAC_2

C498

Close to A32

DMI

R387 0_0402_5% PM@ 2

1

1

HDA

180Ohm@100MHz GM@

+1.5VS

1 2 R396 0_0402_5% R395 JAL90GM@ 0_0402_5% GLPM@

VCCD_HDA: 50mA (0.1UF*1) +1.5VS_HDA

1

50mA
A32 VCC_HDA

456mA
VCC_DMI_1 VCC_DMI_2 VCC_DMI_3 VCC_DMI_4 AH48 AF48 AH47 AG47 +1.05VS_DMI

10U_0805_10V4Z 2

220U_D2_4VM_R15 +1.05VS

D TV/CRT

0.1U_0402_16V4Z 2 JAL90GM@ +1.5VS_TVDAC +1.5VS_QDAC

58.696mA
M25 L28 AF1 VCCD_TVDAC VCCD_QDAC

48.363mA

VCC_DMI: 456mA (0.1UF*1)

1

1 2 R163 0_0805_5% C219 0.1U_0402_16V4Z

2

VCCD_HPLL: 157.2mA (0.1UF*1)
+1.05VS_HPLL

157.2mA
VCCD_HPLL VCCD_PEG_PLL AA47 M38 L37

2 VTTLF1 VTTLF2 VTTLF3 VTTLF_CAP1 A8 VTTLF_CAP2 L1 AB2 VTTLF_CAP3 C142 1 C438 1 C452 1

VCCD_TVDAC: 58.696mA (0.1UF*1, 0.01UF*1)
+1.5VS 1 2 L6 MBK1608221YZF_0603 C183 1 C184 1

+1.5VS_TVDAC

60.31mA

LVDS

VCCD_LVDS_1 VCCD_LVDS_2

VTTLF

Please check Power source if want support IAMT

+1.05VS_PEGPLL

50mA

2

A

VCCD_QDAC: 48.363mA +1.5VS_QDAC (0.1UF*1, 0.01UF*1)
+1.5VS 1 2 R83 100_0603_1% C179 C188 1 1 1

C201 C203 GM@ GM@ 10U_0805_6.3V6M 2 2 1U_0402_6.3V4Z

1

1

1

0.1U_0402_16V4Z 2 2 0.022U_0402_16V7K

Also power for internal Thermal Sensor
+1.8V

VCCD_PEG_PLL: 50mA (0.1UF*1)
1 R132 0_0603_5% GM@ 2 +1.8V_LVDS

CANTIGA ES_FCBGA1329 JAL90GM@ R131 0_0402_5% PM@

0.47U_0603_16V4Z 0.47U_0603_16V4Z 2 2 2 0.47U_0603_16V4Z

D10 +1.05VS 2 1 1

R172 2 +3VS

A

VCCD_LVDS: 60.311111mA (1UF*1)
R91 0_0402_5% @

10_0603_5% CH751H-40PT_SOD323-2

180Ohm@100MHz

2

0.1U_0402_16V4Z 2 2 0.01U_0402_16V7K

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc. SCHEMATIC,LA-4201P
Rev I Sheet
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

401551

Date:

Monday, July 21, 2008

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50

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U31I AU48 AR48 AL48 BB47 AW47 AN47 AJ47 AF47 AD47 AB47 Y47 T47 N47 L47 G47 BD46 BA46 AY46 AV46 AR46 AM46 V46 R46 P46 H46 F46 BF44 AH44 AD44 AA44 Y44 U44 T44 M44 F44 BC43 AV43 AU43 AM43 J43 C43 BG42 AY42 AT42 AN42 AJ42 AE42 N42 L42 BD41 AU41 AM41 AH41 AD41 AA41 Y41 U41 T41 M41 G41 B41 BG40 BB40 AV40 AN40 H40 E40 AT39 AM39 AJ39 AE39 N39 L39 B39 BH38 BC38 BA38 AU38 AH38 AD38 AA38 Y38 U38 T38 J38 F38 C38 BF37 BB37 AW37 AT37 AN37 AJ37 H37 C37 BG36 BD36 AK15 AU36 VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98 VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198 VSS_199 AM36 AE36 P36 L36 J36 F36 B36 AH35 AA35 Y35 U35 T35 BF34 AM34 AJ34 AF34 AE34 W34 B34 A34 BG33 BC33 BA33 AV33 AR33 AL33 AH33 AB33 P33 L33 H33 N32 K32 F32 C32 A31 AN29 T29 N29 K29 H29 F29 A29 BG28 BD28 BA28 AV28 AT28 AR28 AJ28 AG28 AE28 AB28 Y28 P28 K28 H28 F28 C28 BF26 AH26 AF26 AB26 AA26 C26 B26 BH25 BD25 BB25 AV25 AR25 AJ25 AC25 Y25 N25 L25 J25 G25 E25 BF24 AD12 AY24 AT24 AJ24 AH24 AF24 AB24 R24 L24 K24 J24 G24 F24 E24 BH23 AG23 Y23 B23 A23 AJ6 BG21 L12 AW21 AU21 AP21 AN21 AH21 AF21 AB21 R21 M21 J21 G21 BC20 BA20 AW20 AT20 AJ20 AG20 Y20 N20 K20 F20 C20 A20 BG19 A18 BG17 BC17 AW17 AT17 R17 M17 H17 C17 BA16 AU16 AN16 N16 K16 G16 E16 BG15 AC15 W15 A15 BG14 AA14 C14 BG13 BC13 BA13 AN13 AJ13 AE13 N13 L13 G13 E13 BF12 AV12 AT12 AM12 AA12 J12 A12 BD11 BB11 AY11 AN11 AH11 Y11 N11 G11 C11 BG10 AV10 AT10 AJ10 AE10 AA10 M10 BF9 BC9 AN9 AM9 AD9 G9 B9 BH8 BB8 AV8 AT8

U31J VSS_199 VSS_200 VSS_201 VSS_202 VSS_203 VSS_204 VSS_205 VSS_206 VSS_207 VSS_208 VSS_209 VSS_210 VSS_211 VSS_212 VSS_213 VSS_214 VSS_215 VSS_216 VSS_217 VSS_218 VSS_219 VSS_220 VSS_221 VSS_222 VSS_223 VSS_224 VSS_225 VSS_226 VSS_227 VSS_228 VSS_229 VSS_230 VSS_231 VSS_232 VSS_233 VSS_235 VSS_237 VSS_238 VSS_239 VSS_240 VSS_241 VSS_242 VSS_243 VSS_244 VSS_245 VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252 VSS_255 VSS_256 VSS_257 VSS_258 VSS_259 VSS_260 VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266 VSS_267 VSS_268 VSS_269 VSS_270 VSS_271 VSS_272 VSS_273 VSS_275 VSS_276 VSS_277 VSS_278 VSS_279 VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290 VSS_291 VSS_292 VSS_293 VSS_294 VSS_295 VSS_296 VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325 VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350 VSS_351 VSS_352 VSS_353 VSS_354 VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8 VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16 VSS_SCB_1 VSS_SCB_2 VSS_SCB_3 VSS_SCB_4 VSS_SCB_5 AH8 Y8 L8 E8 B8 AY7 AU7 AN7 AJ7 AE7 AA7 N7 J7 BG6 BD6 AV6 AT6 AM6 M6 C6 BA5 AH5 AD5 Y5 L5 J5 H5 F5 BE4 BC3 AV3 AL3 R3 P3 F3 BA2 AW2 AU2 AR2 AP2 AJ2 AH2 AF2 AE2 AD2 AC2 Y2 M2 K2 AM1 AA1 P1 H1 U24 U28 U25 U29 AF32 AB32 V32 AJ30 AM29 AF29 AB29 U26 U23 AL20 V20 AC19 AL17 AJ17 AA17 U17 BH48 BH1 A48 C1 A3

D

D

VSS

VSS

C

C

B

VSS NCTF

B

VSS SCB

CANTIGA ES_FCBGA1329 JAL90GM@

NC_26 NC_27 NC_28 NC_29 NC_30 NC_31 NC_32 NC_33 NC_34 NC_35 NC_36 NC_37 NC_38 NC_39 NC_40 NC_41 NC_42

E1 D2 C3 B4 A5 A6 A43 A44 B45 C46 D47 B47 A46 F48 E48 C48 B48

CANTIGA ES_FCBGA1329 JAL90GM@
A A

NC

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc. SCHEMATIC,LA-4201P
Rev I Sheet
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

401551

Date:

Monday, July 21, 2008

13

of

50

5

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+1.8V JDIMM2 +DIMM_VREF DDRA_SDQ0 DDRA_SDQ1 9 DDRA_SDQS0# 9 DDRA_SDQS0 DDRA_SDQS0# DDRA_SDQS0 DDRA_SDQ2 DDRA_SDQ3
D

+1.8V +1.8V VSS DQ4 DQ5 VSS DM0 VSS DQ6 DQ7 VSS DQ12 DQ13 VSS DM1 VSS CK0 CK0# VSS DQ14 DQ15 VSS VSS DQ20 DQ21 VSS NC DM2 VSS DQ22 DQ23 VSS DQ28 DQ29 VSS DQS3# DQS3 VSS DQ30 DQ31 VSS NC/CKE1 VDD NC/A15 NC/A14 VDD A11 A7 A6 VDD A4 A2 A0 VDD BA1 RAS# S0# VDD ODT0 NC/A13 VDD NC VSS DQ36 DQ37 VSS DM4 VSS DQ38 DQ39 VSS DQ44 DQ45 VSS DQS5# DQS5 VSS DQ46 DQ47 VSS DQ52 DQ53 VSS CK1 CK1# VSS DM6 VSS DQ54 DQ55 VSS DQ60 DQ61 VSS DQS7# DQS7 VSS DQ62 DQ63 VSS SAO SA1 GND 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 204 DDRA_SDQ4 DDRA_SDQ5 DDRA_SDM0 DDRA_SDQ6 DDRA_SDQ7 DDRA_SDQ12 DDRA_SDQ13 DDRA_SDM1 DDRA_CLK0 8 DDRA_CLK0# 8 DDRA_SDQ14 DDRA_SDQ15 9 DDRA_SMA[0..14] 9 DDRA_SDQ[0..63] DDRA_SDQ20 DDRA_SDQ21 DDRA_SDM2 DDRA_SDQ22 DDRA_SDQ23 DDRA_SDQ28 DDRA_SDQ29 DDRA_SDQS3# DDRA_SDQS3 DDRA_SDQ30 DDRA_SDQ31 DDRA_CKE1 DDRA_SMA14 DDRA_SMA11 DDRA_SMA7 DDRA_SMA6 DDRA_SMA4 DDRA_SMA2 DDRA_SMA0 DDRA_SBS1# DDRA_SRAS# DDRA_SCS0# DDRA_ODT0 DDRA_SMA13 DDRA_SBS1# 9 DDRA_SRAS# 9 DDRA_SCS0# 8 DDRA_ODT0 8 DDRA_SMA12 1 DDRA_SMA9 2 RP40 DDRA_SMA8 DDRA_SMA5 DDRA_SMA3 DDRA_SMA1 1 2 RP35 1 2 RP31 4 3 56_0404_4P2R_5% 4 3 56_0404_4P2R_5% 4 3 56_0404_4P2R_5% 4 3 56_0404_4P2R_5% 4 3 56_0404_4P2R_5% 4 3 56_0404_4P2R_5% +0.9VS 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 2 2 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z DDRA_CKE1 8 DDRA_CKE0 1 DDRA_SBS2# 2 RP45 DDRA_SDQS3# 9 DDRA_SDQS3 9 +1.8V +0.9VS 4 3 56_0404_4P2R_5% PM_EXTTS#0 8 C150 1 C123 1 C136 1 C102 1 C113 1 9 DDRA_SDM[0..7] DDRA_SMA[0..14] DDRA_SDQ[0..63] DDRA_SDM[0..7] +1.8V 1 1K_0402_1% 2 C206 0.1U_0402_16V4Z +DIMM_VREF 1 R138

DDRA_SDQ8 DDRA_SDQ9 9 DDRA_SDQS1# 9 DDRA_SDQS1 DDRA_SDQS1# DDRA_SDQS1 DDRA_SDQ10 DDRA_SDQ11

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 203

VREF VSS DQ0 DQ1 VSS DQS0# DQS0 VSS DQ2 DQ3 VSS DQ8 DQ9 VSS DQS1# DQS1 VSS DQ10 DQ11 VSS VSS DQ16 DQ17 VSS DQS2# DQS2 VSS DQ18 DQ19 VSS DQ24 DQ25 VSS DM3 NC VSS DQ26 DQ27 VSS CKE0 VDD NC BA2 VDD A12 A9 A8 VDD A5 A3 A1 VDD A10/AP BA0 WE# VDD CAS# NC/S1# VDD NC/ODT1 VSS DQ32 DQ33 VSS DQS4# DQS4 VSS DQ34 DQ35 VSS DQ40 DQ41 VSS DM5 VSS DQ42 DQ43 VSS DQ48 DQ49 VSS NC,TEST VSS DQS6# DQS6 VSS DQ50 DQ51 VSS DQ56 DQ57 VSS DM7 VSS DQ58 DQ59 VSS SDA SCL VDDSPD GND

20mils

20mils

To SODIMM and GMCH
D

+DIMM_VREF R136 1K_0402_1% 2 2.2U_0603_6.3V6K 2.2U_0603_6.3V6K 2.2U_0603_6.3V6K 2 2 2 2 2 2.2U_0603_6.3V6K 2.2U_0603_6.3V6K 1

2

DDRA_SDQ16 DDRA_SDQ17 9 DDRA_SDQS2# 9 DDRA_SDQS2 DDRA_SDQS2# DDRA_SDQS2 DDRA_SDQ18 DDRA_SDQ19 DDRA_SDQ24 DDRA_SDQ25 DDRA_SDM3 DDRA_SDQ26 DDRA_SDQ27
C

8 DDRA_CKE0 9 DDRA_SBS2#

DDRA_CKE0 DDRA_SBS2# DDRA_SMA12 DDRA_SMA9 DDRA_SMA8 DDRA_SMA5 DDRA_SMA3 DDRA_SMA1 DDRA_SMA10 DDRA_SBS0# DDRA_SWE# DDRA_SCAS# DDRA_SCS1# DDRA_ODT1 DDRA_SDQ32 DDRA_SDQ33

C436

1

C433

1

C442

1

C447

1

C

9 DDRA_SBS0# 9 DDRA_SWE# 9 DDRA_SCAS# 8 DDRA_SCS1# 8 DDRA_ODT1

DDRA_SMA10 1 DDRA_SBS0# 2 RP27 DDRA_SWE# 1 DDRA_SCAS# 2 RP23 DDRA_SCS1# 1 DDRA_ODT1 2 RP19

C101

1

C103

1

C110

1

C119

1

C128

1

DDRA_SDQ36 DDRA_SDQ37 DDRA_SDM4 DDRA_SDQ38 DDRA_SDQ39 DDRA_SDQ44 DDRA_SDQ45 DDRA_SDQS5# DDRA_SDQS5 DDRA_SDQ46 DDRA_SDQ47 DDRA_SDQ52 DDRA_SDQ53 DDRA_CLK1 8 DDRA_CLK1# 8 DDRA_SDM6 DDRA_SDQ54 DDRA_SDQ55 DDRA_SDQ60 DDRA_SDQ61 DDRA_SDQS7# DDRA_SDQS7 DDRA_SDQ62 DDRA_SDQ63 R25 R21 1 1 2 10K_0402_5% 2 10K_0402_5% DDRA_SDQS7# 9 DDRA_SDQS7 9 DDRA_SDQS5# 9 DDRA_SDQS5 9

0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 2 2 2 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z

9 DDRA_SDQS4# 9 DDRA_SDQS4

DDRA_SDQS4# DDRA_SDQS4 DDRA_SDQ34 DDRA_SDQ35 DDRA_SDQ40 DDRA_SDQ41

+0.9VS

DDRA_SMA11 1 DDRA_SMA14 2 RP41 DDRA_SMA6 DDRA_SMA7 DDRA_SMA2 DDRA_SMA4 1 2 RP37 1 2 RP32

4 3 56_0404_4P2R_5% 4 3 56_0404_4P2R_5% 4 3 56_0404_4P2R_5% 4 3 56_0404_4P2R_5% 4 3 56_0404_4P2R_5% 4 3 56_0404_4P2R_5% 2 56_0402_5%

C109

1

1 C115

C124

1

C153

1

C143

1
B

B

DDRA_SDM5 DDRA_SDQ42 DDRA_SDQ43 DDRA_SDQ48 DDRA_SDQ49

0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 2 2 2 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z

+0.9VS

9 DDRA_SDQS6# 9 DDRA_SDQS6

DDRA_SDQS6# DDRA_SDQS6 DDRA_SDQ50 DDRA_SDQ51 DDRA_SDQ56 DDRA_SDQ57 DDRA_SDM7 DDRA_SDQ58 DDRA_SDQ59

DDRA_SBS1# 1 DDRA_SMA0 2 RP28 DDRA_SCS0# 1 DDRA_SRAS# 2 RP24 DDRA_SMA13 1 DDRA_ODT0 2 RP20 DDRA_CKE1 R71 1

C141

1

C133

1

C151

1

0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 2 2 0.1U_0402_16V4Z

15,16,20 D_CK_SDATA 15,16,20 D_CK_SCLK

D_CK_SDATA D_CK_SCLK +3VS

A

+3VS

FOX_AS0A426-N2RN-7F CONN@

A

C32

1

C57

1

DIMM0 REV H:5.2mm (BOT)
Security Classification Issued Date 2007/09/20

0.1U_0402_16V4Z 2 2.2U_0603_6.3V6K 2

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc. SCHEMATIC,LA-4201P
Document Number Rev I Sheet
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2

401551
Monday, July 21, 2008 14 of 50

Date:

A

B

C

D

E

+DIMM_VREF +1.8V JDIMM1 +DIMM_VREF DDRB_SDQ0 DDRB_SDQ5
1

+1.8V

+1.8V C209 VSS DQ4 DQ5 VSS DM0 VSS DQ6 DQ7 VSS DQ12 DQ13 VSS DM1 VSS CK0 CK0# VSS DQ14 DQ15 VSS VSS DQ20 DQ21 VSS NC DM2 VSS DQ22 DQ23 VSS DQ28 DQ29 VSS DQS3# DQS3 VSS DQ30 DQ31 VSS NC/CKE1 VDD NC/A15 NC/A14 VDD A11 A7 A6 VDD A4 A2 A0 VDD BA1 RAS# S0# VDD ODT0 NC/A13 VDD NC VSS DQ36 DQ37 VSS DM4 VSS DQ38 DQ39 VSS DQ44 DQ45 VSS DQS5# DQS5 VSS DQ46 DQ47 VSS DQ52 DQ53 VSS CK1 CK1# VSS DM6 VSS DQ54 DQ55 VSS DQ60 DQ61 VSS DQS7# DQS7 VSS DQ62 DQ63 VSS SAO SA1 GND 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 DDRB_SDQ4 DDRB_SDQ1 DDRB_SDM0 DDRB_SDQ6 DDRB_SDQ7 DDRB_SDQ12 DDRB_SDQ13 DDRB_SDM1 DDRB_CLK0 8 DDRB_CLK0# 8 DDRB_SDQ14 DDRB_SDQ15 9 DDRB_SMA[0..14] 9 DDRB_SDQ[0..63] 9 DDRB_SDM[0..7] DDRB_SDQ20 DDRB_SDQ21 DDRB_SDM2 DDRB_SDQ22 DDRB_SDQ23 DDRB_SDQ28 DDRB_SDQ29 DDRB_SDQS3# DDRB_SDQS3 DDRB_SDQ30 DDRB_SDQ31 DDRB_CKE1 DDRB_SMA14 DDRB_SMA11 DDRB_SMA7 DDRB_SMA6 DDRB_SMA4 DDRB_SMA2 DDRB_SMA0 DDRB_SBS1# DDRB_SRAS# DDRB_SCS0# DDRB_ODT0 DDRB_SMA13 DDRB_SBS1# 9 DDRB_SRAS# 9 DDRB_SCS0# 8 DDRB_ODT0 8 DDRB_CKE1 8 DDRB_SMA12 DDRB_SMA9 DDRB_SMA8 DDRB_SMA5 DDRB_SMA3 DDRB_SMA1 DDRB_SMA10 DDRB_SBS0# DDRB_SWE# DDRB_SCAS# DDRB_SCS1# DDRB_ODT1 DDRB_SDQS3# 9 DDRB_SDQS3 9 DDRB_CKE0 DDRB_SBS2# 1 2 RP44 1 2 RP39 1 2 RP34 1 2 RP30 1 2 RP26 1 2 RP22 1 2 RP18 PM_EXTTS#1 8 DDRB_SMA[0..14] DDRB_SDQ[0..63] DDRB_SDM[0..7] 1 C207 1 +

1 C160 2 +

1 C230 @

9 DDRB_SDQS0# 9 DDRB_SDQS0

DDRB_SDQS0# DDRB_SDQS0 DDRB_SDQ2 DDRB_SDQ3 DDRB_SDQ8 DDRB_SDQ9

9 DDRB_SDQS1# 9 DDRB_SDQS1

DDRB_SDQS1# DDRB_SDQS1 DDRB_SDQ10 DDRB_SDQ11

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201

VREF VSS DQ0 DQ1 VSS DQS0# DQS0 VSS DQ2 DQ3 VSS DQ8 DQ9 VSS DQS1# DQS1 VSS DQ10 DQ11 VSS VSS DQ16 DQ17 VSS DQS2# DQS2 VSS DQ18 DQ19 VSS DQ24 DQ25 VSS DM3 NC VSS DQ26 DQ27 VSS CKE0 VDD NC BA2 VDD A12 A9 A8 VDD A5 A3 A1 VDD A10/AP BA0 WE# VDD CAS# NC/S1# VDD NC/ODT1 VSS DQ32 DQ33 VSS DQS4# DQS4 VSS DQ34 DQ35 VSS DQ40 DQ41 VSS DM5 VSS DQ42 DQ43 VSS DQ48 DQ49 VSS NC,TEST VSS DQS6# DQS6 VSS DQ50 DQ51 VSS DQ56 DQ57 VSS DM7 VSS DQ58 DQ59 VSS SDA SCL VDDSPD GND

2.2U_0603_6.3V6K 2 2 0.1U_0402_16V4Z

2 330U_D2E_2.5VM_R15 330U_D2E_2.5VM_R15
1

DDRB_SDQ16 DDRB_SDQ17 9 DDRB_SDQS2# 9 DDRB_SDQS2 DDRB_SDQS2# DDRB_SDQS2 DDRB_SDQ18 DDRB_SDQ19 DDRB_SDQ24 DDRB_SDQ25 DDRB_SDM3
2

+1.8V +0.9VS
2

DDRB_SDQ26 DDRB_SDQ27 8 DDRB_CKE0 9 DDRB_SBS2# DDRB_CKE0 DDRB_SBS2# DDRB_SMA12 DDRB_SMA9 DDRB_SMA8 DDRB_SMA5 DDRB_SMA3 DDRB_SMA1 DDRB_SMA10 DDRB_SBS0# DDRB_SWE# DDRB_SCAS# DDRB_SCS1# DDRB_ODT1 DDRB_SDQ32 DDRB_SDQ33 9 DDRB_SDQS4# 9 DDRB_SDQS4 DDRB_SDQS4# DDRB_SDQS4 DDRB_SDQ34 DDRB_SDQ35 DDRB_SDQ40 DDRB_SDQ41 DDRB_SDM5 DDRB_SDQ42 DDRB_SDQ43 DDRB_SDQ48 DDRB_SDQ49

4 3 56_0404_4P2R_5% 4 3 56_0404_4P2R_5% 4 3 56_0404_4P2R_5% 4 3 56_0404_4P2R_5% 4 3 56_0404_4P2R_5% 4 3 56_0404_4P2R_5% 4 3 56_0404_4P2R_5%

C152

1

C140

1

C120

1

C99

1

C112

1

2.2U_0603_6.3V6K 2.2U_0603_6.3V6K 2.2U_0603_6.3V6K 2 2 2 2 2 2.2U_0603_6.3V6K 2.2U_0603_6.3V6K

+1.8V

C106

1

C96

1

C156

1

C129

1

9 DDRB_SBS0# 9 DDRB_SWE# 9 DDRB_SCAS# 8 DDRB_SCS1# 8 DDRB_ODT1

0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 2 2 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z

DDRB_SDQ36 DDRB_SDQ37 DDRB_SDM4 DDRB_SDQ38 DDRB_SDQ39 DDRB_SDQ44 DDRB_SDQ45 DDRB_SDQS5# DDRB_SDQS5 DDRB_SDQ46 DDRB_SDQ47 DDRB_SDQ52 DDRB_SDQ53 DDRB_CLK1 8 DDRB_CLK1# 8 DDRB_SDM6 DDRB_SDQ54 DDRB_SDQ55 DDRB_SDQ60 DDRB_SDQ61 DDRB_SDQS5# 9 DDRB_SDQS5 9

+0.9VS

3

DDRB_SMA11 DDRB_SMA14 DDRB_SMA6 DDRB_SMA7 DDRB_SMA2 DDRB_SMA4 DDRB_SBS1# DDRB_SMA0 DDRB_SCS0# DDRB_SRAS# DDRB_SMA13 DDRB_ODT0 DDRB_CKE1

1 2 RP42 1 2 RP38 1 2 RP33 1 2 RP29 1 2 RP25 1 2 RP21 R70 1

4 3 56_0404_4P2R_5% 4 3 56_0404_4P2R_5% 4 3 56_0404_4P2R_5% 4 3 56_0404_4P2R_5% 4 3 56_0404_4P2R_5% 4 3 56_0404_4P2R_5% 2 56_0402_5%

C111

1

C117

1

C114

1

C107

1

C132

1
3

0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 2 2 2 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z

+0.9VS

C146

1

C121

1

C144

1

C105

1

C97

1

9 DDRB_SDQS6# 9 DDRB_SDQS6

DDRB_SDQS6# DDRB_SDQS6 DDRB_SDQ50 DDRB_SDQ51 DDRB_SDQ56 DDRB_SDQ57 DDRB_SDM7 DDRB_SDQ58 DDRB_SDQ59

0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 2 2 2 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z

+0.9VS

DDRB_SDQS7# DDRB_SDQS7 DDRB_SDQ62 DDRB_SDQ63 R24 R20 1 1

DDRB_SDQS7# 9 DDRB_SDQS7 9

C154

1

C134

1

C125

1

0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 2 2 0.1U_0402_16V4Z

14,16,20 D_CK_SDATA 14,16,20 D_CK_SCLK
4

D_CK_SDATA D_CK_SCLK +3VS

2 10K_0402_5% 2 10K_0402_5%

+3VS

4

FOX_AS0A426-NARN-7F CONN@

DIMM1 REV H:9.2mm (BOT)
Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc. SCHEMATIC,LA-4201P
Document Number Rev I Sheet
E

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A B C D

401551
Monday, July 21, 2008 15 of 50

Date:

A

B

C

D

E

F

G

H

FSLC
0 0 0
1

FSLB
0 1 1

FSLA
0 0 1

CLKSEL2 CLKSEL1 CLKSEL0

CPU MHz
266 200 166 Control
PCIEX10 PCIEX6 PCIEX4 PCIEX9

SRC MHz
100 100 100

PCI MHz
33.3 33.3 33.3

+CLK_VDDSRC +1.05VS L11 2 1 KC FBM-L11-201209-221LMAT_0805 1 1 1 1 1 1 1 1 C280 C289 C288 C315 C327 C297 C329 C275 10U_0805_10V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 2 2 2 2 2 2 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z U15 +CLK_VDD +3VS

+CLK_VDD

Clock Generator

L14 2 1 KC FBM-L11-201209-221LMAT_0805 1 1 1 1 1 1 1 1 C331 C286 C305 C300 C330 C287 C328 C333 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 2 2 2 2 2 2 2 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z

1

Table : ICS9LPRS387 CLK_REQ#
CR#_10(WLAN) CR#_6(MCH) CR#_4(NEW CARD) CR#_9(MINI CARDII)

Free-Run
PCIEX0 PCIEX1
+3VS

6 19 72 12 27 55
R454 10K_0402_5% @

ICS9LPRS387, PN:SA000020H10 SLG8SP556V, PN:SA000020K00
VDDREF VDD48 VDDCPU VDDPCI VDDPLL3

SDATA SCLK

9 10 71 70 68 67 24 25 28 29 32 33 35 36 39 40 57 56 61 60 64 63 44 45 50 51 48 47

D_CK_SDATA D_CK_SCLK CLK_CPU_BCLK CLK_CPU_BCLK# CLK_MCH_BCLK CLK_MCH_BCLK# CLK_DREF_96M CLK_DREF_96M# CLK_DREF_SSC CLK_DREF_SSC# CLK_PCIE_SATA CLK_PCIE_SATA# CLK_PCIE_ICH CLK_PCIE_ICH# CLK_PCIE_CARD CLK_PCIE_CARD# CLK_MCH_3GPLL CLK_MCH_3GPLL# CLK_PCIE_VGA CLK_PCIE_VGA# CLK_PCIE_READER

D_CK_SDATA 14,15,20 D_CK_SCLK 14,15,20 CLK_CPU_BCLK 4 CLK_CPU_BCLK# 4 CLK_MCH_BCLK 7 CLK_MCH_BCLK# 7 CLK_DREF_96M 8 CLK_DREF_96M# 8

CPUT0_LPR_F CPUC0_LPR_F CPUT1_LPR_F

SRC7(VGA_CLK): Discrete VGA[Enable] UMA[Disable]
+3VS

VDDSRC CPUC1_LPR_F VDDSRC_IO SRCT0_LPR/DOTT_96_LPR VDDSRC_IO SRCC0_LPR/DOTC_96_LPR VDDSRC_IO VDDPLL3_IO VDDCPU_IO VDD96_IO SRCT2_LPR/SATAT_LPR SRCC2_LPR/SATAC_LPR CPU_STOP# PCI_STOP# SRCT3_LPR SRCC3_LPR 27MHz_NonSS/SRCT1_LPR/SE1 27MHz_SS/SRCC1_LPR/SE2

2

+CLK_VDDSRC

52 38 62

CLK_PCI2=1, Trusted Mode Enable(No overclocking allowed)
1 R475 1 R474
2

D

1

1 R466

CLK_PCI2 2 10K_0402_5%

1

CK505_PWRGD

2 @ 10K_0402_5% 2 10K_0402_5%

mount to Enable ITP_CLK
CLK_PCI5

3

S

2 G Q16 2N7002_SOT23 @

CLK_ENABLE# 46

31 66 23

VGA: disable this pair by BIOS
CLK_DREF_SSC CLK_DREF_SSC# 8 8

VGA: disable this pair by BIOS
CLK_PCIE_SATA 22 CLK_PCIE_SATA# 22 CLK_PCIE_ICH CLK_PCIE_ICH# CLK_PCIE_CARD CLK_PCIE_CARD# CLK_MCH_3GPLL 8 CLK_MCH_3GPLL# 8 CLK_PCIE_VGA 17 CLK_PCIE_VGA# 17 23 23 30 30
2

CLK_PCI5=0, Pin63,64 is SRC_CLK CLK_PCI5=1, Pin63,64 is ITP_CLK
1 R471
CLK_PCI4 2 10K_0402_5%

23 H_STP_CPU# 23 H_STP_PCI#

H_STP_CPU# H_STP_PCI#

53 54

CLK_PCI4=0, Pin28, 29 is SRC_CLK Pin24, 25 is DOT96_CLK
1 R197 2 @ 10K_0402_5%
CK_PWRGD 31 CLK_PCI_LPC C309 1 C321 1 CLK_PCI_LPC R216 2 CLK_PCI2

13 14 15 16 17

PCI1 PCI2/TME PCI3

SRCT4_LPR SRCC4_LPR SRCT6_LPR

1 33_0402_5%

CLK_PCI3 CLK_PCI4

2 @ 2 @

10P_0402_50V8J CLK_PCI_LPC 10P_0402_50V8J CLK_PCI_ICH 21 CLK_PCI_ICH CLK_PCI_ICH R219 2 0_0402_5% 2 0_0402_5% 2

PCI4/27_SELECT SRCC6_LPR PCI_F5/ITP_EN SRCT7_LPR CK_PWRGD/PD# SRCC7_LPR

1 33_0402_5% 1 R199 1 R204

CLK_PCI5

For EMI 10/9
+1.05VS

23 CK_PWRGD 8,23,46 VGATE C301 1 2

@

CK505_PWRGD1

CLK_XTALIN

5 4 11

UMA: disable this pair by BIOS
CLK_PCIE_READER CLK_PCIE_READER# CLK_PCIE_MINI2 CLK_PCIE_MINI2# CLK_PCIE_MINI1 CLK_PCIE_MINI1# CLK_PCIE_LAN 27 CLK_PCIE_LAN# 27 29 29 29 29 26 26

X1 X2 NC

CPUT2_ITP_LPR/SRCT8_LPR CPUC2_ITP_LPR/SRCC8_LPR SRCT9_LPR SRCC9_LPR

2

R233 @ 56_0402_5% R240 1K_0402_5% 1 2

1

27P_0402_50V8J C296 27P_0402_50V8J 1 2 MCH_CLKSEL0 8 23 CLK_ICH_48M CPU_BSEL0 5

CLK_XTALOUT Y1 14.31818MHz_20P_FSX8L14.318181M20FDB

CLK_PCIE_READER# CLK_PCIE_MINI2 CLK_PCIE_MINI2# CLK_PCIE_MINI1 CLK_PCIE_MINI1# CLK_PCIE_LAN CLK_PCIE_LAN#

3

R231 2.2K_0402_5% CLKSEL0 1 2

2

3

1

CLK_ICH_48M R484 2

1 33_0402_5%

CLKSEL0 CLKSEL1

20 2 7 8

1 2 R232 @ 1K_0402_5%
+1.05VS

1 R241 0_0402_5%

2

USB_48MHz/FSLA SRCT10_LPR FSLB/TEST_MODE SRCC10_LPR FSLC/TEST_SEL/REF0 REF1 SRCT11_LPR SRCC11_LPR

23 CLK_ICH_14M

CLK_ICH_14M R212 2

1 33_0402_5%

CLKSEL2

2

R456 @ 1K_0402_5% R459 1K_0402_5% 1 2

+3VS R228 4.7K_0402_5% 1 2

69 3
+3VS

GNDCPU GNDREF GNDPCI GND48 GND GND GNDSRC GNDSRC GNDSRC GND_THERMAL_PAD
ICS9LPRS387BKLFT_MLF72_10x10

2 G

CR#3 CR#4 CR#6 CR7# CR#9 CR10# CR#11 CR#A

37 41 58 65 43 49 46 21
4

CLKSEL1

MCH_CLKSEL1 8 23,29,30 ICH_SMBDATA CPU_BSEL1 5

1
D

3
S

D_CK_SDATA

18 22 30 26 34

1 R214

2 10K_0402_5%

+3VS EXP_CLKREQ# 30 MCH_CLKREQ# 8 +3VS MINI2_CLKREQ# 29 +3VS MINI1_CLKREQ# 29

1

1 R455 @ 0_0402_5%

2

1 R461 0_0402_5%

2

Q48 2N7002_SOT23 +3VS R221 4.7K_0402_5% 1 2

(Pull High to +3VS at GMCH side)

+1.05VS
4

2 G

1 R213 1 R211

2 10K_0402_5% 2 10K_0402_5%

+3VS

R465 @ 1K_0402_5% R462 1K_0402_5% 1 2

23,29,30 ICH_SMBCLK

2

1
D

3
S

D_CK_SCLK

59 42 73

Q49 2N7002_SOT23

(Pull High to +3VS at ICH side)

SATA_CLKREQ# 23

R463 10K_0402_5% CLKSEL2 1 2

1

MCH_CLKSEL2 8 CPU_BSEL2 5

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc. SCHEMATIC,LA-4201P
Rev I Sheet 16
H

1 R464 @ 0_0402_5%

2

1 R470 0_0402_5%

2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

401551
G

Date:

Monday, July 21, 2008

of

50

A

B

C

D

E

F

5

4

3

2

1

+MXM_B+

10 PCIE_MTX_C_GRX_N[0..15] 10 PCIE_MTX_C_GRX_P[0..15] 10 PCIE_GTX_C_MRX_N[0..15]
D

PCIE_MTX_C_GRX_N[0..15] PCIE_MTX_C_GRX_P[0..15] PCIE_GTX_C_MRX_N[0..15] PCIE_GTX_C_MRX_P[0..15]

160mil(4A)

10 PCIE_GTX_C_MRX_P[0..15]

1 C508 PM@ 680P_0603_50V7K 68P_0402_50V8J 2 2

L34 2 1 KC FBM-L11-201209-221LMAT_0805 PM@ L35 2 1 KC FBM-L11-201209-221LMAT_0805 PM@ 1 C504

B+ C510

2

160mil(4A)

8 SDVO_SCLK 8 SDVO_SDATA

JAL90GM@ SDVO_SCLK R331 1 2 SDVO_SDATA R333 1 2 JAL90GM@

0_0402_5% D_EC_SMB_CK1 0_0402_5% D_EC_SMB_DA1

1 0.1U_0603_25V7K
D

JMXM1A +MXM_B+

JMXM1B

1 3 5 7 9 11 13 15 17 19 21 23

PWR_SRC PWR_SRC PWR_SRC PWR_SRC PWR_SRC PWR_SRC PWR_SRC PWR_SRC GND GND GND GND

1V8RUN 1V8RUN 1V8RUN 1V8RUN 1V8RUN 1V8RUN 1V8RUN RUNPWROK 5VRUN GND GND GND

2 4 6 8 10 12 14 16 18 20 22 24

+1.8VS

PCIE_GTX_C_MRX_N1 PCIE_GTX_C_MRX_P1 PCIE_GTX_C_MRX_N0 PCIE_GTX_C_MRX_P0 16 CLK_PCIE_VGA# 16 CLK_PCIE_VGA 21 PLTRST_VGA# 22 HDA_SYNC_VGA 22 HDA_BITCLK_VGA CLK_PCIE_VGA# CLK_PCIE_VGA

140mil(3.5A)

VGA_ON 33 +5VS

D_EC_SMB_DA1 D_EC_SMB_CK1 VGA_CRT_HSYNC VGA_CRT_VSYNC VGA_DDC_CLK VGA_DDC_DATA PM@ 2HDA_SDIN3_VGA 1 R319 33_0402_5% R516 1 1K_0402_5% 1

PCIE_GTX_C_MRX_N15 PCIE_GTX_C_MRX_P15
C

PCIE_GTX_C_MRX_N14 PCIE_GTX_C_MRX_P14 PCIE_GTX_C_MRX_N13 PCIE_GTX_C_MRX_P13 PCIE_GTX_C_MRX_N12 PCIE_GTX_C_MRX_P12 PCIE_GTX_C_MRX_N11 PCIE_GTX_C_MRX_P11 PCIE_GTX_C_MRX_N10 PCIE_GTX_C_MRX_P10 PCIE_GTX_C_MRX_N9 PCIE_GTX_C_MRX_P9 PCIE_GTX_C_MRX_N8 PCIE_GTX_C_MRX_P8 PCIE_GTX_C_MRX_N7 PCIE_GTX_C_MRX_P7 PCIE_GTX_C_MRX_N6 PCIE_GTX_C_MRX_P6 PCIE_GTX_C_MRX_N5 PCIE_GTX_C_MRX_P5

B

PCIE_GTX_C_MRX_N4 PCIE_GTX_C_MRX_P4 PCIE_GTX_C_MRX_N3 PCIE_GTX_C_MRX_P3 PCIE_GTX_C_MRX_N2 PCIE_GTX_C_MRX_P2

25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107

PEX_RX15# PEX_RX15 GND PEX_RX14# PEX_RX14 GND PEX_RX13# PEX_RX13 GND PEX_RX12# PEX_RX12 GND PEX_RX11# PEX_RX11 GND PEX_RX10# PEX_RX10 GND PEX_RX9# PEX_RX9 GND PEX_RX8# PEX_RX8 GND PEX_RX7# PEX_RX7 GND PEX_RX6# PEX_RX6 GND PEX_RX5# PEX_RX5 GND PEX_RX4# PEX_RX4 GND PEX_RX3# PEX_RX3 GND PEX_RX2# PEX_RX2 GND

PRSNT2# PEX_TX15# PEX_TX15 GND PEX_TX14# PEX_TX14 GND PEX_TX13# PEX_TX13 GND PEX_TX12# PEX_TX12 GND PEX_TX11# PEX_TX11 GND PEX_TX10# PEX_TX10 GND PEX_TX9# PEX_TX9 GND PEX_TX8# PEX_TX8 GND PEX_TX7# PEX_TX7 GND PEX_TX6# PEX_TX6 GND PEX_TX5# PEX_TX5 GND PEX_TX4# PEX_TX4 GND PEX_TX3# PEX_TX3 GND PEX_TX2# PEX_TX2

26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108

PCIE_MTX_C_GRX_N15 PCIE_MTX_C_GRX_P15 PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_P14 PCIE_MTX_C_GRX_N13 PCIE_MTX_C_GRX_P13 PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_N11 PCIE_MTX_C_GRX_P11 PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_P10 PCIE_MTX_C_GRX_N9 PCIE_MTX_C_GRX_P9 PCIE_MTX_C_GRX_N8 PCIE_MTX_C_GRX_P8 PCIE_MTX_C_GRX_N7 PCIE_MTX_C_GRX_P7 PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_P6 PCIE_MTX_C_GRX_N5 PCIE_MTX_C_GRX_P5 PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_P4 PCIE_MTX_C_GRX_N3 PCIE_MTX_C_GRX_P3 PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_P2

19 VGA_CRT_HSYNC 19 VGA_CRT_VSYNC 19 VGA_DDC_CLK 19 VGA_DDC_DATA 22 HDA_SDIN3 22 HDA_SDOUT_VGA +3VS 31 EC_ACIN

2 @ 2

D30 @ CH751H-40PT_SOD323-2 1 2 R534 0_0402_5% PM@

20,31 DVI_DET 20 VGA_DVI_TXC20 VGA_DVI_TXC+ 20 VGA_DVI_TXD220 VGA_DVI_TXD2+ 20 VGA_DVI_TXD120 VGA_DVI_TXD1+ 20 VGA_DVI_TXD020 VGA_DVI_TXD0+

DVI_DET VGA_DVI_TXCVGA_DVI_TXC+ VGA_DVI_TXD2VGA_DVI_TXD2+ VGA_DVI_TXD1VGA_DVI_TXD1+ VGA_DVI_TXD0VGA_DVI_TXD0+

109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203 205 207 209 211 213 215 217 219 221 223 225 227 229 231

PEX_RX1# GND PEX_RX1 PEX_TX1# GND PEX_TX1 PEX_RX0# GND PEX_RX0 PEX_TX0# GND PEX_TX0 PEX_REFCLK# PRSNT1# PEX_REFCLK TV_C/HDTV_Pr CLK_REQ# GND PEX_RST# TV_Y/HDTV_Y/TV_CVBS HDA_SYNC GND HDA_BCLK TV_CVBS/HDTV_Pb SMB_DAT GND SMB_CLK VGA_RED THERM# GND VGA_HSYNC VGA_GRN VGA_VSYNC GND HDA_SDI VGA_BLU HDA_SDO GND IGP_UCLK# LVDS_UCLK# IGP_UCLK LVDS_UCLK GND GND DP_L3# LVDS_UTX3# DP_L3 LVDS_UTX3 AC/BATT# GND DP_L2# LVDS_UTX2# DP_L2 LVDS_UTX2 GND GND DP_L1# LVDS_UTX1# DP_L1 LVDS_UTX1 GND GND DP_L0# LVDS_UTX0# DP_L0 LVDS_UTX0 GND GND DVI_B_CLK LVDS_LCLK# DVI_B_CLK LVDS_LCLK DVI_B_HPD/DVI_C_HPD/GND GND DP_AUX# LVDS_LTX3# DP_AUX LVDS_LTX3 GND DP_HPD DVI_B_TX2# LVDS_LTX2#/DVI_C_TX2# DVI_B_TX2 LVDS_LTX2/DVI_C_TX2 GND GND DVI_B_TX1# LVDS_LTX1#/DVI_C_LTX1# DVI_B_TX1 LVDS_LTX1/DVI_C_LTX1 GND GND DVI_B_TX0# LVDS_LTX0#/DVI_C_LTX0# DVI_B_TX0 LVDS_LTX0/DVI_C_LTX0 DVI_A_HPD GND DVI_A_CLK# DDCC_DAT DVI_A_CLK DDCC_CLK GND LVDS_PPEN DVI_A_TX2# LVDS_BL_BRGHT DVI_A_TX2 LVDS_BLEN GND DDCB_DAT DVI_A_TX1# DDCB_CLK DVI_A_TX1 2V5RUN GND GND DVI_A_TX0# 3V3RUN DVI_A_TX0 3V3RUN GND 3V3RUN GND
QUASA_CA0481-230N00 CONN@

110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 206 208 210 212 214 216 218 220 222 224 226 228 230 232

PCIE_MTX_C_GRX_N1 PCIE_MTX_C_GRX_P1 PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_P0

VGA_CRT_R VGA_CRT_G VGA_CRT_B VGA_TZCLKVGA_TZCLK+

HDA_RST_VGA# 22 VGA_CRT_R 19 VGA_CRT_G 19 VGA_CRT_B 19 VGA_TZCLK- 18 VGA_TZCLK+ 18

C

SPDIF_HDMI VGA_TZOUT2VGA_TZOUT2+ VGA_TZOUT1VGA_TZOUT1+ VGA_TZOUT0VGA_TZOUT0+ VGA_TXCLKVGA_TXCLK+

SPDIF_HDMI 34 VGA_TZOUT2- 18 VGA_TZOUT2+ 18 VGA_TZOUT1- 18 VGA_TZOUT1+ 18 VGA_TZOUT0- 18 VGA_TZOUT0+ 18 VGA_TXCLK- 18 VGA_TXCLK+ 18

VGA_TXOUT2VGA_TXOUT2+ VGA_TXOUT1VGA_TXOUT1+ VGA_TXOUT0VGA_TXOUT0+ I2CC_SDA I2CC_SCL ENVDD ENBKL VGA_DVI_SDATA VGA_DVI_SCLK +2.5VS +3VS

VGA_TXOUT2- 18 VGA_TXOUT2+ 18 VGA_TXOUT1- 18 VGA_TXOUT1+ 18 VGA_TXOUT0- 18 VGA_TXOUT0+ 18 I2CC_SDA 18 I2CC_SCL 18 ENVDD 18 ENBKL 10,31 VGA_DVI_SDATA 20 VGA_DVI_SCLK 20
B

QUASA_CA0481-230N00 CONN@

GND

+3VS

+2.5VS

+5VS 31,40 EC_SMB_DA1

2 G

1
D Q52 2N7002_SOT23 PM@

3
S

D_EC_SMB_DA1

+1.05VS

+1.05VS

+1.05VS

+1.05VS

+1.05VS

C72

1

C512

1

A

C598 @ 0.1U_0402_16V4Z

1

2

C599 @ 0.1U_0402_16V4Z

1

2

C600 @ 0.1U_0402_16V4Z

1

2

C601 @ 0.1U_0402_16V4Z

1

2

C602 @ 0.1U_0402_16V4Z

1

0.1U_0402_16V4Z PM@ 2

2 0.1U_0402_16V4Z PM@

2 G

D

S

31,40 EC_SMB_CK1

1
Q53 2N7002_SOT23 PM@

3

D_EC_SMB_CK1
A

2

For Return Path between GND and 1.05V

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc. SCHEMATIC,LA-4201P
Document Number Rev I Sheet
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2

401551
Monday, July 21, 2008 17 of 50

Date:

5

4

3

2

1

D

+3VS

D

+3V 1

+3VS

INVTPWM

4

NC

P 2

+LCDVDD

LCD POWER CIRCUIT
W=60mils
1 R278 100K_0402_5% 2 1 C371 4.7U_0805_10V4Z R280 +3VS 1 2 10K_0402_5% @

1

U24 Y

5

A 3 G

DPST_PWM 10

R274 300_0603_5% 3 2

NC7SZ14P5X_NL_SC70-5 @

2 3 S Q32 AO3413_SOT23-3 1 D

Q33B 2N7002DW-T/R7_SOT363-6 4 5

INVTPWM

1 D

2 G 3 S Q34 2N7002_SOT23 @

2 R277 6

1 1K_0402_5% 1 C372

2

10 GMCH_ENVDD 17 ENVDD

R276 1 R279 1

1

1

GM@ 2 0_0402_5% PM@ 2 0_0402_5%

Q33A 2 2N7002DW-T/R7_SOT363-6

0.047U_0402_16V7K 2 1 C370 1

R275 100K_0402_5% 2

C

+3VS 1

R281 D18 31 BKOFF# +INVPWR_B+ L16 2 1 KC FBM-L11-201209-221LMAT_0805 L15 2 1 KC FBM-L11-201209-221LMAT_0805 C368 1 1 C361 B+ DAC_BRIG INVTPWM DISPOFF# 1 C367 1 C366 1 C365 2 2 2 220P_0402_50V7K 220P_0402_50V7K 220P_0402_50V7K I2CC_SCL I2CC_SDA BKOFF# 2 1 2 CH751H-40PT_SOD323-2 4.7K_0402_5% DISPOFF# TZOUT0TZOUT0+ TZOUT1TZOUT1+ TZOUT2TZOUT2+ TZCLKTZCLK+

W=40mils

680P_0402_50V7K 68P_0402_50V8J 2 2
B

LCD/PANEL BD. Conn.
JLVDS1 +INVPWR_B+ +3VS 17 I2CC_SCL 17 I2CC_SDA I2CC_SCL I2CC_SDA TZOUT0TZOUT0+ TZOUT1+ TZOUT1TZOUT2+ TZOUT2TZCLKTZCLK+ 23 USB20_N6 23 USB20_P6 0_0402_5% R271 1 R270 1 0_0402_5% 2USB20_CMOS_N6 2USB20_CMOS_P6 42 40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 GND 40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 GND 39 37 35 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 41 39 37 35 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 DAC_BRIG INVTPWM R272 1 DISPOFF# +LCDVDD DAC_BRIG 31 2 0_0402_5% INVT_PWM 31

W=60mils
TXOUT0TXOUT0+ TXOUT1TXOUT1+ TXOUT2+ TXOUT2TXCLKTXCLK+ +3VS +LCDVDD +3VS

ACES_88242-4001 CONN@
A A

5

4

G

+LCDVDD

W=60mils
C364 0.1U_0402_16V4Z

For GMCH DPST

4.7U_0805_10V4Z 2

2

C

TXOUT0TXOUT0+ RP2 TXOUT1TXOUT1+ RP4 TXOUT2TXOUT2+ RP6 TXCLKTXCLK+ RP8

1 2 1 2 1 2 1 2

1 2 RP10 1 2 RP12 1 2 RP14 1 2 RP16

4 3 PM@ 4 3 PM@ 4 3 PM@ 4 3 PM@ 4 3 PM@ 4 3 PM@ 4 3 PM@ 4 3 PM@

VGA_TXOUT0VGA_TXOUT0+ 0_0404_4P2R_5% VGA_TXOUT1VGA_TXOUT1+ 0_0404_4P2R_5% VGA_TXOUT2VGA_TXOUT2+ 0_0404_4P2R_5% VGA_TXCLKVGA_TXCLK+ 0_0404_4P2R_5% VGA_TZOUT0VGA_TZOUT0+ 0_0404_4P2R_5% VGA_TZOUT1VGA_TZOUT1+ 0_0404_4P2R_5% VGA_TZOUT2VGA_TZOUT2+ 0_0404_4P2R_5% VGA_TZCLKVGA_TZCLK+ 0_0404_4P2R_5%

VGA_TXOUT0- 17 VGA_TXOUT0+ 17 VGA_TXOUT1- 17 VGA_TXOUT1+ 17 VGA_TXOUT2- 17 VGA_TXOUT2+ 17 VGA_TXCLK- 17 VGA_TXCLK+ 17 VGA_TZOUT0- 17 VGA_TZOUT0+ 17 VGA_TZOUT1- 17 VGA_TZOUT1+ 17 VGA_TZOUT2- 17 VGA_TZOUT2+ 17 VGA_TZCLK- 17 VGA_TZCLK+ 17

RP1

1 2

GMCH_LCD_CLK 4 GMCH_LCD_DATA 3 GM@ 0_0404_4P2R_5%

GMCH_LCD_CLK 10 GMCH_LCD_DATA 10
B

TXOUT0TXOUT0+ RP3 TXOUT1TXOUT1+ RP5 TXOUT2TXOUT2+ RP7 TXCLKTXCLK+ RP9 TZOUT0TZOUT0+ TZOUT1TZOUT1+ 1 C362 0.1U_0402_16V4Z 1 C369 10U_0805_10V4Z 1 C363 0.1U_0402_16V4Z TZCLKTZCLK+ TZOUT2TZOUT2+

2 1 2 1 2 1 2 1

2

2

2

2 1 RP11 2 1 RP13 2 1 RP15 2 1 RP17

3 4 GM@ 3 4 GM@ 3 4 GM@ 3 4 GM@ 3 4 GM@ 3 4 GM@ 3 4 GM@ 3 4 GM@

GMCH_TXOUT0GMCH_TXOUT0+ 0_0404_4P2R_5% GMCH_TXOUT1GMCH_TXOUT1+ 0_0404_4P2R_5% GMCH_TXOUT2GMCH_TXOUT2+ 0_0404_4P2R_5% GMCH_TXCLKGMCH_TXCLK+ 0_0404_4P2R_5% GMCH_TZOUT0GMCH_TZOUT0+ 0_0404_4P2R_5% GMCH_TZOUT1GMCH_TZOUT1+ 0_0404_4P2R_5% GMCH_TZOUT2GMCH_TZOUT2+ 0_0404_4P2R_5% GMCH_TZCLKGMCH_TZCLK+ 0_0404_4P2R_5%

GMCH_TXOUT0- 10 GMCH_TXOUT0+ 10 GMCH_TXOUT1- 10 GMCH_TXOUT1+ 10 GMCH_TXOUT2- 10 GMCH_TXOUT2+ 10 GMCH_TXCLK- 10 GMCH_TXCLK+ 10 GMCH_TZOUT0- 10 GMCH_TZOUT0+ 10 GMCH_TZOUT1- 10 GMCH_TZOUT1+ 10 GMCH_TZOUT2- 10 GMCH_TZOUT2+ 10 GMCH_TZCLK- 10 GMCH_TZCLK+ 10

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc. SCHEMATIC,LA-4201P
Rev I Sheet
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

401551

Date:

Monday, July 21, 2008

18

of

50

3

2

A

B

C

D

E

CRT Connector

D23

D22

D21

W=40mils
+5VS 1 D5 2 1 1 RB491D_SC59-3 +R_CRT_VCC F1 2 1.1A_6VDC_FUSE 1 C63 0.1U_0402_16V4Z 2
1

+CRT_VCC

DAN217_SC59 DAN217_SC59 DAN217_SC59

W=40mils

1

2

3

2

1 3

2

1

+3VS

CRT_R L21 CRT_G L19 CRT_B 1 1 L17 1 R304 2 2 150_0402_1% 150_0402_1% 10P_0402_50V8J 2 1 C429 C421 GM@ 1 C405 GM@ 1 GM@ R318 R312

1 GM@ 1 GM@ 1 GM@

CRT_R_1 2 FCM2012C-800_0805 CRT_G_1 2 FCM2012C-800_0805 CRT_B_1 2 FCM2012C-800_0805 C432 1 C428 1 C419 1

L22 L20 L18

1 1 1

2 FCM2012C-800_0805 2 FCM2012C-800_0805 2 FCM2012C-800_0805 1 1 1

CRT_R_2 CRT_G_2 CRT_B_2 6 11 1 7 12 2 8 13 3 9 14 4 10 15 5

3

JCRT1

150_0402_1%

2 2 10P_0402_50V8J

2 10P_0402_50V8J

GM@ 2

GM@ 2 GM@ 2 22P_0402_50V8J 22P_0402_50V8J 22P_0402_50V8J

C430 C422 10P_0402_50V8J 10P_0402_50V8J 2 GM@ GM@ 2

2

C406 10P_0402_50V8J GM@ C389 CRT_HSYNC_2 CRT_VSYNC_2 1 1 C58 1

16 17

change to 12pf for Discrete
1 L4 2 10_0603_5% 2 10_0603_5%

change to 15pf for Discrete
+CRT_VCC 1 2 0.1U_0402_16V4Z 5 1 U4 Y 4 CRT_HSYNC_1 2 R29 1 10K_0402_5%

2 100P_0402_50V8J DSUB_12 1 DSUB_15

SUYIN_070549FR015S208CR CONN@ CRT_DET# 23,38

L3, L4 10_0603_5% PN: SD013100A80

C67
2

C66 10P_0402_50V8J 10P_0402_50V8J 2 2

2 R293 100K_0402_5% 1
2

1 L3

CRT_HSYNC

2

OE#

2 C71 68P_0402_50V8J 1 2 1 R544 JAL90@ 0_0402_5% D_CRT_HSYNC 38 2

A G 3

P

C22 +CRT_VCC 68P_0402_50V8J

74AHCT1G125GW_SOT353-5 +CRT_VCC

5

1 OE#

C62

1

2 0.1U_0402_16V4Z CRT_VSYNC

U3 Y 4 CRT_VSYNC_1 2 1 R545 JAL90@ 0_0402_5% D_CRT_VSYNC 38

2

A G 3

P

74AHCT1G125GW_SOT353-5

+CRT_VCC

Place closed to chipset
+3VS 1 1

pull-up 10k on AMD M82M MXM side pull-up 2.2k on GPU side
1 2 R320 PM@ 0_0402_5% VGA_DDC_DATA 17
3

R30 4.7K_0402_5% 2
3

R22 4.7K_0402_5% 2 2 G

NOTE:
10 GMCH_CRT_VSYNC 10 GMCH_CRT_HSYNC 10 GMCH_CRT_B 10 GMCH_CRT_G 10 GMCH_CRT_R R43 R50 1 GM@ 1 GM@ 2 2 2 2 2 30.1_0402_1% 30.1_0402_1% 0_0402_5% 0_0402_5% 0_0402_5% CRT_VSYNC CRT_HSYNC CRT_B_S CRT_G_S CRT_R_S CRT_R_S CRT_G_S CRT_B_S R42 R49 2 PM@ 0_0402_5% 2 PM@ 0_0402_5% 2 PM@ 0_0402_5% 2 PM@ 0_0402_5% 2 PM@ 0_0402_5% CRT_VSYNC CRT_HSYNC CRT_B_S CRT_G_S CRT_R_S CRT_B_S CRT_G_S 8 GND 20,38 EC_DOCKIN#_S0 1 15 4 7 9 12 U28

L : A-->B1 H: A-->B2
+5VS

D

Q50 2N7002_SOT23 38 D_DDC_CLK D_CRT_R 38 D_CRT_G 38 D_CRT_B 38 DSUB_15 1 D

S

38 D_DDC_DATA

DSUB_12

1

3 2 G

R321 GM@ 0_0402_5% 2 1

GMCH_CRT_DATA 10

R322 1 GM@ R327 1 GM@ R329 1 GM@

SEL OE# 1A 2A 3A 4A

1B1 2B1 3B1 4B1 1B2 2B2 3B2 4B2

2 5 11 14 3 6 10 13 CRT_R CRT_G CRT_B

Q51 2N7002_SOT23

S

VCC

16

3

2 1 R326 GM@ 0_0402_5% 1 2 R325 PM@ 0_0402_5%

GMCH_CRT_CLK 10

VGA_DDC_CLK 17

pull-up 2.2k on GPU side pull-up 10k on AMD M82M MXM side

17 VGA_CRT_VSYNC 17 VGA_CRT_HSYNC 17 VGA_CRT_B 17 VGA_CRT_G 17 VGA_CRT_R

1 1

R323 1 R328 1 R330 1

FSAV330MTC_TSSOP16 JAL90@

R518 1 JAW50@2 0_0402_5% R519 1 JAW50@2 0_0402_5% R520 1 JAW50@2 0_0402_5%

CRT_B CRT_G
4

4

CRT_R_S

CRT_R

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc. SCHEMATIC,LA-4201P
Document Number Rev I Sheet
E

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A B C D

401551
Monday, July 21, 2008 19 of 50

Date:

5

4

3

2

1

DDC to Docking 3.3V Level
38 EC_DOCKIN +3VS +5VS EC_DOCKIN

+HDMI_5V_OUT

DDC to HDMI CONN 3.3V Level
1
EC_DOCKIN#_S0

+HDMI_5V_OUT JHDMI1 HDMI_HPD +HDMI_5V_OUT R72 2K_0402_5% JAL90PM@ HDMI_SDATA HDMI_SCLK HDMI_R_CKHDMI_R_CK+ HDMI_R_D0HDMI_SDATA HDMI_R_D0+ HDMI_R_D1HDMI_R_D1+ HDMI_R_D2HDMI_R_D2+ R67 2K_0402_5% JAL90PM@

D

R542 1 JAL90PM@ 4.7K_0402_5% 2 R548 1 @ 2 2.2K_0402_5% VGA_DVI_SCLK

R52 2K_0402_5% JAL90PM@

R51 2K_0402_5% JAL90PM@

19,38 EC_DOCKIN#_S0

17 VGA_DVI_SCLK

3
S S

1
D Q46 BSH111_SOT23 JAL90@

D_DVI_SCLK 38

VGA_DVI_SCLK

3
S

1
D Q5 BSH111_SOT23 JAL90@

HDMI_SCLK

17 VGA_DVI_SDATA +3VS +5VS

VGA_DVI_SDATA

3
S

1
D Q47 BSH111_SOT23 JAL90@

D_DVI_SDATA 38

VGA_DVI_SDATA

3
S

1
D D

R543 1 JAL90PM@ 4.7K_0402_5% 2 R549 1 @ 2 2.2K_0402_5%

Q3 BSH111_SOT23 JAL90@

Place closed to JHDMI1

19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

HP_DET +5V DDC/CEC_GND SDA SCL Reserved CEC CKGND CK_shield GND CK+ GND D0GND D0_shield D0+ D1D1_shield D1+ D2D2_shield D2+
TYCO_1939864-1 CONN@

1

1

2

2

1

2

2

2

2

G

G

D

20 21 22 23

2

MP:Update HDMI Hot Plug DET circuit.
+HDMI_5V_OUT

1 2 R344 JAL90@ 0_0402_5% 2 JAL90@ 1 R332 2.2K_0402_5% 4

D_DVI_DET 38 HDMI_HPD

P

OE#

C440 JAL90@ 0.1U_0402_16V4Z 2

1 5 1
U30

+3VS

2

2

2
C

A G 3

Y

1

1 JAL90PM@ 2 R574 0_0402_5% 1 R569 @
OE 2 0_0402_5%

G

G G

R336 100K_0402_5% JAL90@ DVI_DET 17,31

1

+HDMI_5V_OUT C439 JAL90@ 0.1U_0402_16V4Z D6 +5VS F2

W=40mils
HDMI_CLK-

2

2

1

+HDMI_5V

JAL90@ 74AHCT1G125GW_SOT353-5

RB491D_SC59-3 JAL90@

1 2 1 1.1A_6VDC_FUSE JAL90@ C443 0.1U_0402_16V4Z JAL90@ 2

1 2 R351 JAL90@ 0_0402_5%
L24

HDMI_R_CK-

C

1 4

1 4

2 3

2 3

EC_DVI_DET 31

U40 VGA_DVI_SCLK VGA_DVI_SDATA EC_DOCKIN#_S0

+HDMI_5V_OUT HDMI_CLK+

@ WCM-2012-900T_0805

SN74CBTD3306CPWR_TSSOP8 @ +HDMI_5V_OUT U41 VGA_DVI_SCLK VGA_DVI_SDATA EC_DOCKIN

2

2 5 1 7

1A 2A 1OE# 2OE#

VCC 1B 2B GND

8 3 6 4

D_DVI_SCLK D_DVI_SDATA

+3VS HDMI_TX0D19 SS1040_SOD123 JAL90@ +3VS_D80

1 2 R354 JAL90@ 0_0402_5%

HDMI_R_CK+

1 2 R358 JAL90@ 0_0402_5%
L25

HDMI_R_D0-

1 4

1 4

2 3

2 3

2 5 1 7

2 6 11 15 24 36 48

22

1A 2A 1OE# 2OE#

VCC 1B 2B GND

8 3 6 4

HDMI_SCLK HDMI_SDATA U27 VGA_DVI_TXC+ VGA_DVI_TXCVGA_DVI_TXD0+ VGA_DVI_TXD0VGA_DVI_TXD1+ VGA_DVI_TXD1VGA_DVI_TXD2+ VGA_DVI_TXD2T5 T3 PAD PAD @ @

1

@ WCM-2012-900T_0805

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7

+3VS
B

1 2 R310 JAL90@ 4.7K_0402_5% 1 2 R311 @ 0_0402_5%

MS

+3VS

OE 2 1 JAL90@ D20 CH751H-40PT_SOD323-2 1 2 R305 JAL90@ 4.7K_0402_5%

17 17 17 17 17 17 17 17

VGA_DVI_TXC+ VGA_DVI_TXCVGA_DVI_TXD0+ VGA_DVI_TXD0VGA_DVI_TXD1+ VGA_DVI_TXD1VGA_DVI_TXD2+ VGA_DVI_TXD2-

4 5 7 8 9 10 12 13 16 55 19 20

D0+ D0D1+ D1D2+ D2D3+ D3-

AVDD

SN74CBTD3306CPWR_TSSOP8 @

1 1 C431 C427 JAL90@ JAL90@ 0.1U_0402_16V4Z 2 2 0.1U_0402_16V4Z 25 26 28 29 31 32 34 35 37 38 40 41 43 44 46 47 18 57
HDMI_TX2HDMI_TX2+ HDMI_TX1HDMI_TX1+ HDMI_TX0HDMI_TX0+ HDMI_CLKHDMI_CLK+

HDMI_TX0+

1 2 R364 JAL90@ 0_0402_5%

HDMI_R_D0+

HDMI_TX1-

1 2 R365 JAL90@ 0_0402_5%
L26

HDMI_R_D1B

SEL_OUT SEL_IN SCL/S3 SDA/S2 MS TEST_OUT TEST_IN OE A0/S4 A1/S5 A2/S6 A3/S7 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10

D3-_B D3+_B D2-_B D2+_B D1-_B D1+_B D0-_B D0+_B D3-_A D3+_A D2-_A D2+_A D1-_A D1+_A D0-_A D0+_A NC T-pad AVSS

1 4

1 4

2 3

2 3

@ WCM-2012-900T_0805 HDMI_TX1+

+3VS

+3VS

1 2 R301 @ 4.7K_0402_5% 1 2 R307 JAL90@ 0_0402_5% 1 2 R300 @ 4.7K_0402_5% 1 2 R306 JAL90@ 0_0402_5%

A2

14,15,16 D_CK_SCLK 14,15,16 D_CK_SDATA T6 PAD MS @ OE A0 A1 A2 A3

A3

1 17 54 56 49 50 51 52

D_DVI_TXD2- 38 D_DVI_TXD2+ 38 D_DVI_TXD1- 38 D_DVI_TXD1+ 38 D_DVI_TXD0- 38 D_DVI_TXD0+ 38 D_DVI_TXC- 38 D_DVI_TXC+ 38

1 2 R367 JAL90@ 0_0402_5%

HDMI_R_D1+

HDMI_TX2-

1 2 R372 JAL90@ 0_0402_5%
L27

HDMI_R_D2-

1 4

1 4

2 3

2 3

+3VS

+3VS

1 2 R303 @ 4.7K_0402_5% 1 2 R309 JAL90@ 0_0402_5% 1 2 R302 @ 4.7K_0402_5% 1 2 R308 JAL90@ 0_0402_5%

A0

NOTE:
A1

L : D-->A H: D-->B

@ WCM-2012-900T_0805 HDMI_TX2+ PI3HDMI412ADZBE_TQFN56_8X8 JAL90@

3 14 21 27 30 33 39 42 45 53

A

23

1 2 R373 JAL90@ 0_0402_5%

HDMI_R_D2+

SMBus Address: 1100 000X (b)

A

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc. SCHEMATIC,LA-4201P
Rev I Sheet
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

401551

Date:

Monday, July 21, 2008

20

of

50

5

4

3

2

5

4

3

2

1

DMI for ESI-compatible operation
+3VS

PCI_GNT#1
RP46
D

Low= DMI for ESI-compatible operation High= Default* (Internal pull-up)
D

1 2 3 4

8 7 6 5
8.2K_1206_8P4R_5% RP43

PCI_DEVSEL# PCI_FRAME# PCI_REQ#1 PCI_REQ#2 U9B

1 2 3 4

8 7 6 5
8.2K_1206_8P4R_5%

PCI_PLOCK# PCI_IRDY# PCI_PERR# PCI_PIRQB#

+3VS RP47

1 2 3 4

8 7 6 5
8.2K_1206_8P4R_5% RP48

PCI_PIRQH# PCI_PIRQE# PCI_REQ#0 PCI_PIRQG#

C

8.2K_1206_8P4R_5% RP36 PCI_STOP# PCI_PIRQD# PCI_REQ#3 PCI_TRDY#

1 2 3 4

8 7 6 5
8.2K_1206_8P4R_5%

C450 10P_0402_50V8J @

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

J5 E1 J6 C4

Interrupt I/F
PIRQA# PIRQB# PIRQC# PIRQD# ICH9-M ES_FCBGA676 PIRQE#/GPIO2 PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5

H4 K6 F2 G2

PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# PCI_PIRQH#

A16 Swap Override Strap PCI_GNT#3
R345
B

Low= A16 swap override Enable High= Default*
1 2 1K_0402_5% PCI_GNT#3 @
B

+3VS

P

Boot BIOS Strap
PCI_GNT#0 0 1 1
R350 R337
A

PLT_RST#

U7 2 B

5

SPI_CS#1 1 0 1
1 1

Boot BIOS Loaction SPI PCI LPC*

G

1

Y A 3

4 1

PLT_RST_BUF# 29

NC7SZ08P5X_NL_SC70-5

R37 100K_0402_5%

+3VS

U6 2 B

P

5

2

3

2 1K_0402_5% PCI_GNT#0 @ 2 1K_0402_5% @
SPI_CS#1 23

G

1

Y A

4 1

2 R35
R36 100K_0402_5% PM@

1 100_0402_5% PM@

PLTRST_VGA# 17

For VGA/B

NC7SZ08P5X_NL_SC70-5

PM@

2

1

1 2 3 4

8 7 6 5

PCI_PIRQF# PCI_SERR# PCI_PIRQA# PCI_PIRQC#

D11 C8 D9 E12 E9 C9 E10 B7 C7 C5 G11 F8 F11 E7 A3 D2 F10 D5 D10 B3 F7 C3 F3 F4 C1 G7 H7 D1 G5 H6 G1 H3

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

PCI

REQ0# GNT0# REQ1#/GPIO50 GNT1#/GPIO51 REQ2#/GPIO52 GNT2#/GPIO53 REQ3#/GPIO54 GNT3#/GPIO55 C/BE0# C/BE1# C/BE2# C/BE3# IRDY# PAR PCIRST# DEVSEL# PERR# PLOCK# SERR# STOP# TRDY# FRAME# PLTRST# PCICLK PME#

F1 G4 B6 A7 F13 F12 E6 F6 D8 B4 D6 A5 D3 E3 R1 C6 E4 C2 J4 A4 F5 D7 C14 D4 R2

PCI_REQ#0 PCI_GNT#0 PCI_REQ#1 PCI_GNT#1 PCI_REQ#2 PCI_GNT#2 PCI_REQ#3 PCI_GNT#3 PCI_CBE#0 PCI_CBE#1 PCI_CBE#2 PCI_CBE#3 PCI_IRDY# PCI_PAR PCI_RST# PCI_DEVSEL# PCI_PERR# PCI_PLOCK# PCI_SERR# PCI_STOP# PCI_TRDY# PCI_FRAME# PLT_RST# CLK_PCI_ICH

@ @

PAD PAD

T16 T25

@ @ @ @ @

PAD PAD PAD PAD

T20 T18 T22 T17

PAD T23 PCI_RST# 30

Place closely pin B10
CLK_PCI_ICH

PLT_RST# 8,23,26,27,31 CLK_PCI_ICH 16

R356 10_0402_5% @

2

C

1

2

A

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc.
SCHEMATIC,LA-4201P
Document Number

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2

401551
Monday, July 21, 2008 Sheet
1

Rev I 21 of 50

Date:

5

4

3

2

1

+RTCVCC C130 18P_0402_50V8J 2 1 R359 1M_0402_5% X1

CMOS Settings
ICH_RTCX1 R66 10M_0402_5% 2 1

R347 SHORT OPEN

TPM Settings

R374
+1.05VS H_DPRSTP# R166 H_DPSLP# R165 LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME#

Clear CMOS Keep CMOS

Clear ME RTC Registers SHORT Keep ME RTC Registers OPEN
2 2 1 1

1

3
32.768KHZ_12.5P_MC-306

NC NC

OUT IN

4 1

@ @

56_0402_5% 56_0402_5%

2

SM_INTRUDER#

2

D

+RTCVCC +RTCVCC

C131 18P_0402_50V8J 2 1

U9A

ICH_RTCX2 ICH_RTCRST# ICH_SRTCRST# SM_INTRUDER# ICH_INTVRMEN

C23 C24 A25 F20 C22 B22 A22 E25 C13 F14 G13 D14 D13 D12 E13

RTCX1 RTCX2 RTCRST# SRTCRST# INTRUDER# INTVRMEN LAN100_SLP GLAN_CLK LAN_RSTSYNC LAN_RXD0 LAN_RXD1 LAN_RXD2 LAN_TXD_0 LAN_TXD_1 LAN_TXD_2 GPIO56 GLAN_COMPI GLAN_COMPO HDA_BIT_CLK HDA_SYNC HDA_RST#

1

1 2 R348 20K_0402_5%

+RTCVCC

RTC

R355 332K_0402_1%

close to RAM door
1 2 R347 @ 10K_0603_5% C444 1U_0603_10V6K 1 2

close to RAM door
1 2 R374 @ 10K_0603_5% C464 1U_0603_10V6K 1 2

LPC

1 2 R349 20K_0402_5%

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3 FWH4/LFRAME# LDRQ0# LDRQ1#/GPIO23 A20GATE A20M# DPRSTP# DPSLP#

K5 K4 L6 K2 K3 J3 J1 N7 AJ27 AJ25 AE23 AJ26 AD22 AF25 AE22 AG25 L3 AF23 AF24 AH27 AG26 AG27 AH11 AJ11 AG12 AF12

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

31 31 31 31

D

LPC_FRAME# 31

EC_GA20 H_A20M#

R384 2

ICH_INTVRMEN

1 10K_0402_5% EC_GA20 31 H_A20M# 4 2 2

+3VS

2

High = Internal VR Enable

DPRSTP# R153 1 DPSLP# R150 1 FERR# H_PWRGOOD H_IGNNE# H_INIT# H_INTR EC_KBRST# H_NMI H_SMI# H_STPCLK# THRMTRIP_ICH#

0_0402_5% H_DPRSTP# 0_0402_5% H_DPSLP# H_FERR#

H_DPRSTP# 5,8,46 H_DPSLP# 5 H_FERR# 4

+3VS

LAN / GLAN

FERR# CPUPWRGD IGNNE#

1 R154

2 56_0402_5%
H_PWRGOOD 5 H_IGNNE# 4 H_INIT# 4 H_INTR 4 H_NMI 4 H_SMI# 4 H_STPCLK# 4 R155 1

2 R167

1 56_0402_5%

+1.05VS

1
R157 10K_0402_5% +1.5VS_PCIE_ICH 33 HDA_BITCLK_MDC 33 HDA_SYNC_MDC 33 HDA_RST_MDC# +3V 34 33 8 17 R61 JAL90@ 10K_0402_5% 33 HDA_SDOUT_MDC R62 R412 R414 R419

PROJECT_ID2

B10 B28 B27 AF6 AH4 AE7 AF4 AG4 AH3 AE5

1 1 1 1

SATA_LED#
C

GLAN_COMP 2 24.9_0402_1% HDA_BITCLK_ICH 2 33_0402_5% HDA_SYNC_ICH 2 33_0402_5% HDA_RST_ICH# 2 33_0402_5%

CPU

INIT# INTR RCIN# NMI SMI# STPCLK# THRMTRIP#

2 R378

1 10K_0402_5%

+3VS EC_KBRST# 31

2

R258 need to place within 2" of ICH9M R257 must be place within 2" of R258 w/o stub.
2 54.9_0402_1%
H_THERMTRIP# H_THERMTRIP# 4,8 +1.05VS

C

IHDA

HDA_SDIN0 HDA_SDIN1 HDA_SDIN2 HDA_SDIN3 R413

HDA_SDIN0 HDA_SDIN1 HDA_SDIN2 HDA_SDIN3 HDA_SDOUT HDA_DOCK_EN#/GPIO33 HDA_DOCK_RST#/GPIO34 SATALED# SATA0RXN SATA0RXP SATA0TXN SATA0TXP SATA1RXN SATA1RXP SATA1TXN SATA1TXP
ICH9-M ES_FCBGA676

TP12 SATA4RXN SATA4RXP SATA4TXN SATA4TXP

2 R168

1 56_0402_5%

1

1

2

HDA_SDOUT_ICH 33_0402_5%

AG5 AG7 AE8

2
PROJECT_ID2

32 SATA_LED#

SATA_LED# SATA_DTX_C_IRX_N0 SATA_DTX_C_IRX_P0 SATA_ITX_DRX_N0 SATA_ITX_DRX_P0 SATA_DTX_C_IRX_N1 SATA_DTX_C_IRX_P1 SATA_ITX_DRX_N1 SATA_ITX_DRX_P1

AG8 AJ16 AH16 AF17 AG17 AH13 AJ13 AG14 AF14

R532 JAW50@ 10K_0402_5%

SATA for HDD

25 SATA_DTX_C_IRX_N0 25 SATA_DTX_C_IRX_P0

SATA5RXN SATA5RXP SATA5TXN SATA5TXP

AH9 AJ9 AE10 AF10 AH18 AJ18 AJ7 AH7
CLK_PCIE_SATA# CLK_PCIE_SATA SATARBIAS CLK_PCIE_SATA# 16 CLK_PCIE_SATA 16 R156 1

1

SATA for ODD

25 SATA_DTX_C_IRX_N1 25 SATA_DTX_C_IRX_P1

SATA

SATA_CLKN SATA_CLKP SATARBIAS# SATARBIAS

2

2 24.9_0402_1%

10mils width less than 500mils

B

34 HDA_BITCLK_AUDIO

HDA for AUDIO

34 HDA_SYNC_AUDIO 34 HDA_RST_AUDIO# 34 HDA_SDOUT_AUDIO

1 R420 1 R422 1 R407 1 R421
JAL90GM@ 1 R408 JAL90GM@ 1 R410 JAL90GM@ 1 R411 JAL90GM@ 1 R409 PM@

HDA_BITCLK_ICH 2 33_0402_5% HDA_SYNC_ICH 2 33_0402_5% HDA_RST_ICH# 2 33_0402_5% HDA_SDOUT_ICH 2 33_0402_5% HDA_BITCLK_ICH 2 33_0402_5% HDA_SYNC_ICH 2 33_0402_5% HDA_RST_ICH# 2 33_0402_5% HDA_SDOUT_ICH 2 33_0402_5% HDA_BITCLK_ICH 2 33_0402_5% HDA_SYNC_ICH 2 33_0402_5% HDA_RST_ICH# 2 1K_0402_5% HDA_SDOUT_ICH 2 33_0402_5%

close ICH9
SATA_ITX_DRX_N0 SATA_ITX_DRX_P0

B

1 C521 1 C520

SATA_ITX_C_DRX_N0 2 0.01U_0402_16V7K SATA_ITX_C_DRX_P0 2 0.01U_0402_16V7K SATA_ITX_C_DRX_N1 2 0.01U_0402_16V7K SATA_ITX_C_DRX_P1 2 0.01U_0402_16V7K

SATA_ITX_C_DRX_N0 25 SATA_ITX_C_DRX_P0 25

SATA_ITX_DRX_N1 8 HDA_BITCLK_MCH 8 HDA_SYNC_MCH SATA_ITX_DRX_P1

1 C518 1 C517

SATA_ITX_C_DRX_N1 25 SATA_ITX_C_DRX_P1 25 MAINPWON 40,41 R164 @ 330_0402_5% 1 2

HDA for GMCH

8 HDA_RST_MCH# 8 HDA_SDOUT_MCH

C

1
Q8 2SC2411K_SOT23 @

+1.05VS 17 HDA_BITCLK_VGA +VCC_HDA_ICH

2 B 3
E

HDA for VGA

17 HDA_SYNC_VGA 17 HDA_RST_VGA#

A

R406 1K_0402_5% @ HDA_SDOUT_ICH ICH_TP3 23 R65 1K_0402_5% @

17 HDA_SDOUT_VGA

1 R425 PM@ 1 R424 PM@ 1 R423 PM@ 1 R426

H_THERMTRIP#

Flash Descriptor Security Override Strap GPIO33
Low= Descriptor Security override High= Default* (Internal pull-up)
Compal Secret Data
2007/09/20 Deciphered Date 2008/09/20
Title

A

XOR Chain Entrance Strap ICH_TP3 0 0 1 1 HDA_SDOUT 0 1 0 1 Description RSVD Enter XOR Chain Normal Operation Set PCIE port config bit 1
4

Security Classification Issued Date

Compal Electronics, Inc.
SCHEMATIC,LA-4201P
Rev I Sheet
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

401551

Date:

Monday, July 21, 2008

22

of

50

5

3

2

5

4

3

2

1

+3VS 1 R385 1 R379 1 R151 1 R47 1 R343 1 R380 1 R149 1 R41 1 R418 1 R415 1 R399 1 R87 1 R158 1 R94 1 R398 1 R403 1 R404 +3V 1 1 ICH_SMBCLK 2 2.2K_0402_5% ICH_SMBDATA 2 2.2K_0402_5% EC_SWI# 2 10K_0402_5% ICH_SMLINK0 2 10K_0402_5% ICH_SMLINK1 2 10K_0402_5% LINKALERT# 2 10K_0402_5% XDP_DBRESET# 2 10K_0402_5% 2 ICH_PCIE_WAKE# 1K_0402_5% PM_BATLOW# 2 8.2K_0402_5% EC_LID_OUT# 2 10K_0402_5% ICH_GPIO10 2 10K_0402_5% ICH_GPIO13 2 10K_0402_5% S4_STATE# 2 10K_0402_5% SERIRQ 2 10K_0402_5% PM_CLKRUN# 2 8.2K_0402_5% EC_THERM# 2 8.2K_0402_5% H_STP_PCI# 2 10K_0402_5% H_STP_CPU# 2 10K_0402_5% SB_SPKR 2 1K_0402_5% CR_WAKE# 2 10K_0402_5% ICH_SPI_MOSI 2 1K_0402_5% OCP# 2 10K_0402_5% CR_CPPE# 2 10K_0402_5% ICH_GPIO17 2 10K_0402_5% ICH_GPIO18 2 10K_0402_5% ICH_GPIO20 2 10K_0402_5% SATA_CLKREQ# 2 10K_0402_5% ICH_GPIO38 2 10K_0402_5% ICH_GPIO39 2 10K_0402_5% ICH_GPIO48 2 10K_0402_5% U9C 16,29,30 ICH_SMBCLK 16,29,30 ICH_SMBDATA ICH_SMBCLK ICH_SMBDATA LINKALERT# ICH_SMLINK0 ICH_SMLINK1 EC_SWI# PAD @ SUS_STAT# XDP_DBRESET# PM_SYNC# EC_LID_OUT# H_STP_PCI# H_STP_CPU# PM_CLKRUN# ICH_PCIE_WAKE# SERIRQ EC_THERM# VGATE T14 4 OCP# 26 CR_CPPE# 31 EC_SMI# 31 EC_SCI# PAD @ OCP# CRT_DET CR_CPPE# EC_SMI# ICH_GPIO13 ICH_GPIO17 ICH_GPIO18 ICH_GPIO20 CR_WAKE# ICH_GPIO27 ICH_GPIO28 SATA_CLKREQ# ICH_GPIO38 ICH_GPIO39 ICH_GPIO48 ICH_GPIO49 ICH_GPIO57 SB_SPKR @ @ @ ICH_TP8 ICH_TP9 ICH_TP10 2 R338 1 ICH_VGATE 0_0402_5% ICH_TP11 G16 A13 E17 C17 B18 F19 R4 G19 M6 A17 A14 E19 L4 E20 M5 AJ23 D21 A20 AG19 AH21 AG21 A21 C12 C21 AE18 K1 AF8 AJ22 A9 D19 L1 AE19 AG22 AF21 AH24 A8 M7 AJ24 B21 AH20 AJ20 AJ21 SMBCLK SMBDATA LINKALERT#/GPIO60/CLGPIO4 SMLINK0 SMLINK1

Place closely pin B2

Place closely pin AC1
CLK_ICH_14M 1

SATA GPIO

SMB

SATA0GP/GPIO21 SATA1GP/GPIO19 SATA4GP/GPIO36 SATA5GP/GPIO37 CLK14 CLK48 SUSCLK SLP_S3# SLP_S4# SLP_S5# S4_STATE#/GPIO26 PWROK

AH23 AF19 AE21 AD20 H1 AF3 P1 C16 E16 G17 C10 G20 M2 B13 R3 D20 D22 R5 R6 B16 F24 B19 F22 C19 C25 A19 F21 D18 A16 C18 C11 C20

1 R400 10_0402_5% @ 2 1 C509 10P_0402_50V8J @

PROJECT_ID1 PROJECT_ID0 R401 1 CLK_ICH_14M CLK_ICH_48M SUS_CLK

CLK_ICH_48M 2 10K_0402_5%

@ @ @

31 EC_SWI# T26 4 XDP_DBRESET# 8 PM_SYNC# 31 EC_LID_OUT# 16 H_STP_PCI# 16 H_STP_CPU# 31 PM_CLKRUN# 29,30 ICH_PCIE_WAKE# 31 SERIRQ 31 EC_THERM# 8,16,46 VGATE

RI# SUS_STAT#/LPCPD# SYS_RESET#

clocks

CLK_ICH_14M 16 CLK_ICH_48M 16 @ PAD T27 PM_SLP_S3# 31 PM_SLP_S4# 31 PM_SLP_S5# 31

R81 10_0402_5% @ 2 1 C175 10P_0402_50V8J @

D

@

SMBALERT#/GPIO11 STP_PCI# STP_CPU# CLKRUN# WAKE# SERIRQ THRM# VRMPWRGD TP11 GPIO1 GPIO6 GPIO7 GPIO8 GPIO12 GPIO13 GPIO17 GPIO18 GPIO20 SCLOCK/GPIO22 GPIO27 GPIO28 SATACLKREQ#/GPIO35 SLOAD/GPIO38 SDATAOUT0/GPIO39 SDATAOUT1/GPIO48 GPIO49 GPIO57/CLGPIO5 SPKR MCH_SYNC# TP3 TP8 TP9 TP10 ICH9-M ES_FCBGA676

SYS / GPIO

PMSYNC#/GPIO0

PM_SLP_S3# PM_SLP_S4# PM_SLP_S5# S4_STATE# ICH_PWROK DPRSLPVR 1 R381 PM_BATLOW# PBTN_OUT# LAN_RST# 1 R341 SB_RSMRST# CK_PWRGD ICH_PWROK PM_SLP_M# @ PAD T15

D

2

2

ICH_PWROK 8 2 100_0402_5% PM_DPRSLPVR 8,46

LAN_RST#

1 R342

2 10K_0402_5%

Power MGT

DPRSLPVR/GPIO16 BATLOW# PWRBTN# LAN_RST# RSMRST# CK_PWRGD CLPWROK SLP_M#

@ @ @

No used Integrated LAN, connecting LAN_RST# to GND
ICH_PWROK 1 R324 2 10K_0402_5%

PBTN_OUT# 31 2 @ 0_0402_5% PLT_RST# 8,21,26,27,31

EC_PWROK CK_PWRGD 16 R340 2 @ +3VS CL_CLK0 8 CL_DATA0 8 ICH_PWROK 4 5

1 R339 1 0_0402_5%

2 10K_0402_5%

@ @

MISC GPIO Controller Link

P

CL_CLK0 CL_CLK1 CL_DATA0 CL_DATA1 CL_VREF0 CL_VREF1 CL_RST0# CL_RST1# MEM_LED/GPIO24 GPIO10/SUS_PWR_ACK GPIO14/AC_PRESENT WOL_EN/GPIO9

U29 Y

R46 R45

B A

2 1

EC_PWROK VGATE

EC_PWROK 31,33

+3V 1

C

@

PCI - Express

PROJECT_ID0 1 2 R417 EM@ 10K_0402_5% 1 2 R416 ABO@ 10K_0402_5% PROJECT_ID1 1 2 R405 10K_0402_5% PM_DPRSLPVR 1 2 R382 100K_0402_5% ICH_GPIO49 1 2 R152 @ 1K_0402_5%
B

For Wireless LAN

29 29 29 29 27 27 27 27 29 29 29 29 26 26 26 26

PCIE_PTX_C_IRX_N2 PCIE_PTX_C_IRX_P2 PCIE_ITX_C_PRX_N2 PCIE_ITX_C_PRX_P2 PCIE_PTX_C_IRX_N3 PCIE_PTX_C_IRX_P3 PCIE_ITX_C_PRX_N3 PCIE_ITX_C_PRX_P3 PCIE_PTX_C_IRX_N4 PCIE_PTX_C_IRX_P4 PCIE_ITX_C_PRX_N4 PCIE_ITX_C_PRX_P4 PCIE_PTX_C_IRX_N5 PCIE_PTX_C_IRX_P5 PCIE_ITX_C_PRX_N5 PCIE_ITX_C_PRX_P5

For PCIE LAN

For Robson2

C465 2 C461 2

1 1

0.1U_0402_16V7K 0.1U_0402_16V7K

PCIE_PTX_C_IRX_N4 PCIE_PTX_C_IRX_P4 PCIE_ITX_PRX_N4 PCIE_ITX_PRX_P4

G29 G28 H27 H26 E29 E28 F27 F26 C29 C28 D27 D26

PERN4 PERP4 PETN4 PETP4 PERN5 PERP5 PETN5 PETP5 PERN6/GLAN_RXN PERP6/GLAN_RXP PETN6/GLAN_TXN PETP6/GLAN_TXP

DMI3RXN DMI3RXP DMI3TXN DMI3TXP DMI_CLKN DMI_CLKP

AD27 AD26 AC29 AC28 T26 T25 AF29 AF28 AC5 AC4 AD3 AD2 AC1 AC2 AA5 AA4 AB2 AB3 AA1 AA2 W5 W4 Y3 Y2 W1 W2 V2 V3 U5 U4 U1 U2

DMI_MTX_IRX_N3 DMI_MTX_IRX_P3 DMI_ITX_MRX_N3 DMI_ITX_MRX_P3 CLK_PCIE_ICH# CLK_PCIE_ICH DMI_IRCOMP USB20_N0 USB20_P0 USB20_N1 USB20_P1 USB20_N2 USB20_P2 USB20_N3 USB20_P3 USB20_N4 USB20_P4 USB20_N5 USB20_P5 USB20_N6 USB20_P6 USB20_N7 USB20_P7 USB20_N8 USB20_P8 USB20_N10 USB20_P10

DMI_MTX_IRX_N3 DMI_MTX_IRX_P3 DMI_ITX_MRX_N3 DMI_ITX_MRX_P3

8 8 8 8

2

C472 2 C468 2

1 1

PCIE_PTX_C_IRX_N3 PCIE_PTX_C_IRX_P3 0.1U_0402_16V7K PCIE_ITX_PRX_N3 0.1U_0402_16V7K PCIE_ITX_PRX_P3

J29 J28 K27 K26

PERN3 PERP3 PETN3 PETP3

DMI2RXN DMI2RXP DMI2TXN DMI2TXP

AB27 AB26 AA29 AA28

DMI_MTX_IRX_N2 DMI_MTX_IRX_P2 DMI_ITX_MRX_N2 DMI_ITX_MRX_P2

DMI_MTX_IRX_N2 DMI_MTX_IRX_P2 DMI_ITX_MRX_N2 DMI_ITX_MRX_P2

8 8 8 8

BAV99DW-7_SOT363

1

C475 2 C479 2

1 1

0.1U_0402_16V7K 0.1U_0402_16V7K

PCIE_PTX_C_IRX_N2 PCIE_PTX_C_IRX_P2 PCIE_ITX_PRX_N2 PCIE_ITX_PRX_P2

Direct Media Interface

1 R370 1 R363 1 R362 1 R368 1 R78 1 R369 1 R44 1 R357 1 R361 1 R360 1 R60

26 CR_WAKE# PAD T7 T21 PAD 16 SATA_CLKREQ# R59 10K_0402_5% @

@ @

CL_VREF0_ICH CL_VREF1_ICH CL_RST#0 8 ICH_GPIO24 @ ICH_GPIO10 ICH_ACIN ICH_GPIO9 @ PAD PAD T8 T19

3

NC7SZ08P5X_NL_SC70-5

G

C

ICH_GPIO57 34 SB_SPKR 8 MCH_ICH_SYNC# R58 22 ICH_TP3 100K_0402_5% T30 T11 T12

PAD PAD PAD

1

2 1 +3V R346 100K_0402_5% 2 1 ACIN 31,32,39,42 D24 CH751H-40PT_SOD323-2

@ R179 2 1 0_0402_5% Q10 MMBT3906_SOT23-3 SB_RSMRST# 1 3 C E

1

2

EC_RSMRST# 31

R180 10K_0402_5% U9D 2

2 B 1 R177 D11A 1 6 2 BAV99DW-7_SOT363 D11B 4 3 5 R176 2.2K_0402_5%

2 4.7K_0402_5%

+3V

2

For Express Card

30 30 30 30

PCIE_PTX_C_IRX_N1 PCIE_PTX_C_IRX_P1 PCIE_ITX_C_PRX_N1 PCIE_ITX_C_PRX_P1

C480 ABO@ 1 2 C487 ABO@ 1 2

0.1U_0402_16V7K 0.1U_0402_16V7K

PCIE_PTX_C_IRX_N1 PCIE_PTX_C_IRX_P1 PCIE_ITX_PRX_N1 PCIE_ITX_PRX_P1

N29 N28 P27 P26 L29 L28 M27 M26

PERN1 PERP1 PETN1 PETP1 PERN2 PERP2 PETN2 PETP2

DMI0RXN DMI0RXP DMI0TXN DMI0TXP DMI1RXN DMI1RXP DMI1TXN DMI1TXP

V27 V26 U29 U28 Y27 Y26 W29 W28

DMI_MTX_IRX_N0 DMI_MTX_IRX_P0 DMI_ITX_MRX_N0 DMI_ITX_MRX_P0 DMI_MTX_IRX_N1 DMI_MTX_IRX_P1 DMI_ITX_MRX_N1 DMI_ITX_MRX_P1

DMI_MTX_IRX_N0 DMI_MTX_IRX_P0 DMI_ITX_MRX_N0 DMI_ITX_MRX_P0 DMI_MTX_IRX_N1 DMI_MTX_IRX_P1 DMI_ITX_MRX_N1 DMI_ITX_MRX_P1

8 8 8 8 8 8 8 8

B

+3VS

+3V

1 2 CP_PE# R388 EM@ 10K_0402_5% 1 2 USB_OC#4 R99 10K_0402_5% RP49 1 2 3 4 8 7 6 5 USB_OC#5 USB_OC#9 USB_OC#8 USB_OC#11

For Card Reader

C454 2 ABO@1 C455 2 ABO@1

PCIE_PTX_C_IRX_N5 PCIE_PTX_C_IRX_P5 0.1U_0402_16V7K PCIE_ITX_PRX_N5 0.1U_0402_16V7K PCIE_ITX_PRX_P5

CLK_PCIE_ICH# 16 CLK_PCIE_ICH 16 R134 24.9_0402_1% 1 2 USB20_N0 USB20_P0 USB20_N1 USB20_P1 USB20_N2 USB20_P2 USB20_N3 USB20_P3 USB20_N4 USB20_P4 USB20_N5 USB20_P5 USB20_N6 USB20_P6 USB20_N7 USB20_P7 USB20_N8 USB20_P8

DMI_ZCOMP DMI_IRCOMP USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P USBP10N USBP10P USBP11N USBP11P

Within 500 mils
+1.5VS_PCIE_ICH 30 30 30 30 30 30 38 38 29 29 30 30 18 18 29 29 29 29

R352 3.24K_0402_1% CL_VREF0_ICH C445 1 R353 453_0402_1%

+3VS ICH_SPI_CLK R38 ICH_SPI_CS0# R53 R148 10K_0402_5% ICH_SPI_MOSI ICH_SPI_MISO R40 R54 1 1 1 1 @ @ @ @ 2 15_0402_5% ICH_SPI_CLK_R 2 15_0402_5% ICH_SPI_CS0#_R 21 SPI_CS#1 2 15_0402_5% ICH_SPI_MOSI_R 2 15_0402_5% ICH_SPI_MISO_R USB_OC#0 CP_PE# USB_OC#2 USB_OC#3 USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7 USB_OC#8 USB_OC#9 USB_OC#10 USB_OC#11 2

USB Conn. New Card USB Conn. DOCKING Conn. USB/B Bluetooth CMOS Camera Mini Card(Robson2) Mini Card(WLAN)

D23 D24 F23 D25 E23 N4 N5 N6 P6 M1 N2 M4 M3 N3 N1 P5 P3 AG2 AG1

SPI_CLK SPI_CS0# SPI_CS1#GPIO58/CLGPIO6 SPI_MOSI SPI_MISO OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43 OC5#/GPIO29 OC6#/GPIO30 OC7#/GPIO31 OC8#/GPIO44 OC9#/GPIO45 OC10#/GPIO46 OC11#/GPIO47 USBRBIAS USBRBIAS# ICH9-M ES_FCBGA676

0.1U_0402_16V4Z 2

10K_1206_8P4R_5% RP50 1 2 3 4 8 7 6 5 USB_OC#10 USB_OC#3 USB_OC#7 USB_OC#6

High: CRT Plugged
CRT_DET 1 1 D

SPI USB

19,38 CRT_DET#

3

2 Q9 G 2N7002_SOT23

30 USB_OC#0 30 CP_PE# 30 USB_OC#2 29 USB_OC#4

+3V

S

10K_1206_8P4R_5%

R63 3.24K_0402_1% CL_VREF1_ICH

Internal TPM Strap SPI_MOSI
A

DMI Termination Voltage GPIO49
+3VS U5

Low= Disable* High= iTPM enable by MCH strap

Low= Desktop used High= Mobile* (Internal pull-up)

USB20_N10 30 USB20_P10 30

Finger Print
C137

1

ICH SPI ROM for HDCP
+3VS R55 3.3K_0402_5% @ 1 R34 1 @ 3.3K_0402_5% 2 2 ICH_SPI_CS0# ICH_SPI_WP# ICH_SPI_HOLD# 1 3 7 4 CS# WP# HOLD# GND VCC SCLK SI SO 8 6 5 2

USBRBIAS 2 1 R137 Within 500 mils 22.6_0402_1%

No Reboot Strap
Low= Default* SB_SPKR High= "No Reboot"
Compal Secret Data

R64 453_0402_1%

A

0.1U_0402_16V4Z 2

ICH_SPI_CLK ICH_SPI_MOSI ICH_SPI_MISO

Security Classification Issued Date 2007/09/20

Compal Electronics, Inc.
2008/09/20
Title

Deciphered Date

MX25L4005AMC-12G_SO8 @

If ICH SPI not used, Left NC
5

SPI ROM Footprint 150mil
4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC,LA-4201P
Rev I Sheet
1

401551

Date:

Monday, July 21, 2008

23

of

50

3

2

5

4

3

2

1

+5VS

+3VS +RTCVCC

U9F

A23
C448

2

2

1

C446

1

VCCRTC V5REF V5REF_SUS VCC1_5_B[01] VCC1_5_B[02] VCC1_5_B[03] VCC1_5_B[04] VCC1_5_B[05] VCC1_5_B[06] VCC1_5_B[07] VCC1_5_B[08] VCC1_5_B[09] VCC1_5_B[10] VCC1_5_B[11] VCC1_5_B[12] VCC1_5_B[13] VCC1_5_B[14] VCC1_5_B[15] VCC1_5_B[16] VCC1_5_B[17] VCC1_5_B[18] VCC1_5_B[19] VCC1_5_B[20] VCC1_5_B[21] VCC1_5_B[22] VCC1_5_B[23] VCC1_5_B[24] VCC1_5_B[25] VCC1_5_B[26] VCC1_5_B[27] VCC1_5_B[28] VCC1_5_B[29] VCC1_5_B[30] VCC1_5_B[31] VCC1_5_B[32] VCC1_5_B[33] VCC1_5_B[34] VCC1_5_B[35] VCC1_5_B[36] VCC1_5_B[37] VCC1_5_B[38] VCC1_5_B[39] VCC1_5_B[40] VCC1_5_B[41] VCC1_5_B[42] VCC1_5_B[43] VCC1_5_B[44] VCC1_5_B[45] VCC1_5_B[46] VCC1_5_B[47] VCC1_5_B[48] VCC1_5_B[49]

+ICH_V5REF +ICH_V5REF_SUS

R57 100_0402_5%

D8 CH751H-40PT_SOD323-2

A6 AE1 AA24 AA25 AB24 AB25 AC24 AC25 AD24 AD25 AE25 AE26 AE27 AE28 AE29 F25 G25 H24 H25 J24 J25 K24 K25 L23 L24 L25 M24 M25 N23 N24 N25 P24 P25 R24 R25 R26 R27 T24 T27 T28 T29 U24 U25 V24 V25 U23 W24 W25 K23 Y24 Y25

1

1

0.1U_0402_16V4Z 2 2 1U_0402_6.3V4Z

+ICH_V5REF

C135

2

1U_0402_6.3V6K 1
D

+5VALW

+5V

+3V

R135

1

1

1

R133 100_0402_5% 10_0402_5% @

D9 CH751H-40PT_SOD323-2 +ICH_V5REF_SUS C204 1U_0402_6.3V6K +1.5VS_PCIE_ICH

2

VCC1_05[01] VCC1_05[02] VCC1_05[03] VCC1_05[04] VCC1_05[05] VCC1_05[06] VCC1_05[07] VCC1_05[08] VCC1_05[09] VCC1_05[10] VCC1_05[11] VCC1_05[12] VCC1_05[13] VCC1_05[14] VCC1_05[15] VCC1_05[16] VCC1_05[17] VCC1_05[18] VCC1_05[19] VCC1_05[20] VCC1_05[21] VCC1_05[22] VCC1_05[23] VCC1_05[24] VCC1_05[25] VCC1_05[26]

A15 B15 C15 D15 E15 F15 L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18

+1.05VS C485

U9E

1

C484

1

0.1U_0402_16V4Z 2 2 0.1U_0402_16V4Z

+1.5VS_DMIPLL_ICH L7 1 2 MBK1608301YZF_0603 C162 C166 10U_0805_10V4Z 2 0.01U_0402_16V7K +1.5VS

1

(10UF*1, 0.01UF*1)

+1.05VS C474

1

(4.7UF*1)

1

+1.5VS

L33 2 1 KC FBM-L11-201209-221LMAT_0805 1 C516 +

(220UF*1, 22UF*2, 2.2UF*1)
C463

VCCDMIPLL VCC_DMI[1] VCC_DMI[2] V_CPU_IO[1] V_CPU_IO[2] VCC3_3[01] VCC3_3[02] VCC3_3[07]
VCCP_CORE

R29 W23 Y23 AB23 AC23 AG29 AJ6 AC10 AD19 AF20 AG24 AC20 B9 F9 G3 G6 J2 J7 K7 AJ4 AJ3

4.7U_0805_10V4Z 2

1

C496

1

C476

+1.05VS C462 C469

220U_D2_4VM_R15 10U_0805_10V4Z 2 2 2 10U_0805_10V4Z 2.2U_0603_6.3V6K

1

C499

1

(4.7UF*1, 0.1UF*2)

4.7U_0805_10V4Z

0.1U_0402_16V4Z 2 2 0.1U_0402_16V4Z

VCC3_3[03] VCC3_3[04] VCC3_3[05] VCC3_3[06] VCC3_3[08] VCC3_3[09] VCC3_3[10] VCC3_3[11] VCC3_3[12] VCC3_3[13] VCC3_3[14] VCCHDA

close to AG29
1 1

close to AD19
1 1

close to G6
+3VS

+1.5VS_SATAPLL_ICH
C

+1.5VS

L9 1 2 MBK1608301YZF_0603

C506

C511

C514

C473

C460

1

C459

1

(10UF*1, 1UF*1)

1 1 C221 C224 10U_0805_10V4Z 2 1U_0402_6.3V4Z 2

PCI

0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 2 2 2 2 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z

close to AJ6

close to B9
+VCC_HDA_ICH

close to K7
R160 GLPM@ 0_0603_5% +3VS +1.5VS

+5VALW

AJ19 AC16 AD15 AD16 AE15 AF15 AG15 AH15 AJ15 AC11 AD11 AE11 AF11 AG10 AG11 AH10 AJ10 AC9 AC18 AC19 AC21 G10 G9 AC12 AC13 AC14 AJ5

VCCSUSHDA VCCSATAPLL VCC1_5_A[01] VCC1_5_A[02] VCC1_5_A[03] VCC1_5_A[04] VCC1_5_A[05] VCC1_5_A[06] VCC1_5_A[07] VCC1_5_A[08] VCC1_5_A[09] VCC1_5_A[10] VCC1_5_A[11] VCC1_5_A[12] VCC1_5_A[13] VCC1_5_A[14] VCC1_5_A[15] VCC1_5_A[16] VCC1_5_A[17] VCC1_5_A[18] VCC1_5_A[19] VCC1_5_A[20] VCC1_5_A[21] VCC1_5_A[22] VCC1_5_A[23] VCC1_5_A[24] VCC1_5_A[25] VCCUSBPLL VCCSUS3_3[06] VCCSUS3_3[07] VCCSUS3_3[08] VCCSUS3_3[09] VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13] VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16] VCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19] VCCSUS3_3[20] VCCSUS1_05[1] VCCSUS1_05[2] VCCSUS1_5[1] VCCSUS1_5[2] VCCSUS3_3[01] VCCSUS3_3[02] VCCSUS3_3[03] VCCSUS3_3[04]

1 AC8 TP_VCCSUS1_05_ICH_1 F17 TP_VCCSUS1_05_ICH_2 AD8 TP_VCCSUS1_5_ICH_1 F18 A18 D16 D17 E22
+VCCSUS1_5_ICH_INT_2 @ @ @ PAD PAD PAD T29 T24 T28

C225

R159 0_0603_5% JAL90GM@

+1.5VS

3

2

0.1U_0402_16V4Z

37 SBPWR_EN# C227

2 1

1 1
D

C507

1

C502

+VCCSUS_HDA_ICH R162 GLPM@ 0_0603_5%

Q6 AO3413_SOT23-3 +5V

+3V +1.5V

1U_0402_6.3V4Z 2

2

0.1U_0402_16V4Z 2

1

C458 0.1U_0402_16V4Z

1

C226

R161 0_0603_5% JAL90GM@

VCCPSUS

1U_0402_6.3V4Z

2

2

0.1U_0402_16V4Z

Check Power Source

B

VCCSUS3_3[05]

AF1
C451 0.022U_0402_16V7K C490

+3V

1

C497

1

close to AC7
+1.5VS C515

1

C503

1

0.1U_0402_16V4Z 2

close to AJ5
2 0.1U_0402_16V4Z 2 1 +VCCLAN1_05_INT_ICH C449 0.1U_0402_16V4Z +VCCLAN_ICH

AA7 AB6 AB7 AC6 AC7 A10 A11 A12 B12 A27 D28 D29 E26 E27 A26

VCC1_5_A[26] VCC1_5_A[27] VCC1_5_A[28] VCC1_5_A[29] VCC1_5_A[30] VCCLAN1_05[1] VCCLAN1_05[2] VCCLAN3_3[1] VCCLAN3_3[2]

T1 T2 T3 T4 T5 T6 U6 U7 V6 V7 W6 W7 Y6 Y7 T7

0.1U_0402_16V4Z 2 2 0.022U_0402_16V7K

(0.1UF*1, 0.022UF*2)

close to A18

close to T1

+3VS

VCCCL1_05 VCCCL1_5 VCCCL3_3[1] VCCCL3_3[2]

G22 G23 A24 B24

+VCCCL1_05_INT_ICH +VCCCL1_5_INT_ICH

R56

0_0603_5% C138

1
+VCC_GLANPLL_ICH R48 0_0603_5% 1 C126 C139

+3VS

A

2 0.1U_0402_16V4Z

+1.5VS

VCCGLANPLL VCCGLAN1_5[1] VCCGLAN1_5[2] VCCGLAN1_5[3] VCCGLAN1_5[4] VCCGLAN3_3
ICH9-M ES_FCBGA676

1 1 C457 C453 @ @ 1U_0402_6.3V4Z 2 2 0.1U_0402_16V4Z

C456

1

AA26 AA27 AA3 AA6 AB1 AA23 AB28 AB29 AB4 AB5 AC17 AC26 AC27 AC3 AD1 AD10 AD12 AD13 AD14 AD17 AD18 AD21 AD28 AD29 AD4 AD5 AD6 AD7 AD9 AE12 AE13 AE14 AE16 AE17 AE2 AE20 AE24 AE3 AE4 AE6 AE9 AF13 AF16 AF18 AF22 AH26 AF26 AF27 AF5 AF7 AF9 AG13 AG16 AG18 AG20 AG23 AG3 AG6 AG9 AH12 AH14 AH17 AH19 AH2 AH22 AH25 AH28 AH5 AH8 AJ12 AJ14 AJ17 AJ8 B11 B14 B17 B2 B20 B23 B5 B8 C26 C27 E11 E14 E18 E2 E21 E24 E5 E8 F16 F28 F29 G12 G14 G18 G21 G24 G26 G27 G8 H2 H23 H28 H29

VSS[001] VSS[002] VSS[003] VSS[004] VSS[005] VSS[006] VSS[007] VSS[008] VSS[009] VSS[010] VSS[011] VSS[012] VSS[013] VSS[014] VSS[015] VSS[016] VSS[017] VSS[018] VSS[019] VSS[020] VSS[021] VSS[022] VSS[023] VSS[024] VSS[025] VSS[026] VSS[027] VSS[028] VSS[029] VSS[030] VSS[031] VSS[032] VSS[033] VSS[034] VSS[035] VSS[036] VSS[037] VSS[038] VSS[039] VSS[040] VSS[041] VSS[042] VSS[043] VSS[044] VSS[045] VSS[046] VSS[047] VSS[048] VSS[049] VSS[050] VSS[051] VSS[052] VSS[053] VSS[054] VSS[055] VSS[056] VSS[057] VSS[058] VSS[059] VSS[060] VSS[061] VSS[062] VSS[063] VSS[064] VSS[065] VSS[066] VSS[067] VSS[068] VSS[069] VSS[070] VSS[071] VSS[072] VSS[073] VSS[074] VSS[075] VSS[076] VSS[077] VSS[078] VSS[079] VSS[080] VSS[081] VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106]

VCCPUSB

VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198]

H5 J23 J26 J27 AC22 K28 K29 L13 L15 L2 L26 L27 L5 L7 M12 M13 M14 M15 M16 M17 M23 M28 M29 N11 N12 N13 N14 N15 N16 N17 N18 N26 N27 P12 P13 P14 P15 P16 P17 P2 P23 P28 P29 P4 P7 R11 R12 R13 R14 R15 R16 R17 R18 R28 T12 T13 T14 T15 T16 T17 T23 B26 U12 U13 U14 U15 U16 U17 AD23 U26 U27 U3 V1 V13 V15 V23 V28 V29 V4 V5 W26 W27 W3 Y1 Y28 Y29 Y4 Y5 AG28 AH6 AF2 B25

CORE

D

2

2

2

VCCA3GP VCCA3GP

C

5

S +1.5VS

G R76

ARX ATX
USB CORE

B

(0.1UF*1)
2 0.1U_0402_16V4Z

VSS_NCTF[01] VSS_NCTF[02] VSS_NCTF[03] VSS_NCTF[04] VSS_NCTF[05] VSS_NCTF[06] VSS_NCTF[07] VSS_NCTF[08] VSS_NCTF[09] VSS_NCTF[10] VSS_NCTF[11] VSS_NCTF[12]

A1 A2 A28 A29 AH1 AH29 AJ1 AJ2 AJ28 AJ29 B1 B29

GLAN POWER

ICH9-M ES_FCBGA676
A

(10UF*1, 2.2UF*1)10U_0805_10V4Z 2
2.2U_0603_6.3V6K +VCCGLAN_ICH 0_0603_5% C157 4.7U_0805_10V4Z +3VS

(1UF*1, 0.1UF*1)

(4.7UF*1)

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc.
SCHEMATIC,LA-4201P
Rev I Sheet
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

401551

Date:

Monday, July 21, 2008

24

of

50

4

3

2

5

4

3

2

1

+5VS 0.1U_0402_16V4Z

+3VS 0.1U_0402_16V4Z

1

C573

1

C576

1

C578

1

C564

1

C562

1

C558 <BOM Structure>

2
D

2

2
10U_0805_10V4Z

2
1000P_0402_50V7K

2

2
10U_0805_10V4Z
D

1000P_0402_50V7K

SATA HDD Conn.
JSATA2 SATA_ITX_C_DRX_P0 SATA_ITX_C_DRX_N0 SATA_DTX_IRX_N0 SATA_DTX_IRX_P0 22 SATA_ITX_C_DRX_P0 22 SATA_ITX_C_DRX_N0

1 2 3 4 5 6 7

GND HTX+ HTXGND HRXHRX+ GND

+3VS

22 SATA_DTX_C_IRX_N0 22 SATA_DTX_C_IRX_P0

SATA_DTX_C_IRX_N0 SATA_DTX_C_IRX_P0

1 C551 1 C552

SATA_DTX_IRX_N0 2 0.01U_0402_16V7K SATA_DTX_IRX_P0 2 0.01U_0402_16V7K +5VS

C

8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

VCC3.3 VCC3.3 VCC3.3 GND GND GND VCC5 VCC5 VCC5 GND RESERVED GND VCC12 VCC12 GND VCC12 GND

C

24 23

OCTEK_SAT-22SU1G_22P_NR-T CONN@

+5VS 0.1U_0402_16V4Z

1

C259

1

C254

1

C260

2
1000P_0402_50V7K

2

2
10U_0805_10V4Z

SATA ODD Conn.
JSATA1
B

22 SATA_ITX_C_DRX_P1 22 SATA_ITX_C_DRX_N1

SATA_ITX_C_DRX_P1 SATA_ITX_C_DRX_N1 SATA_DTX_IRX_N1 SATA_DTX_IRX_P1

1 2 3 4 5 6 7 8 9 10 11 12 13

B

GND A+ AGND BB+ GND DP +5V +5V MD GND GND

R173 1

@

2 1K_0402_1% +5VS

22 SATA_DTX_C_IRX_N1 22 SATA_DTX_C_IRX_P1

SATA_DTX_C_IRX_N1 SATA_DTX_C_IRX_P1

1 C264 1 C262

SATA_DTX_IRX_N1 2 0.01U_0402_16V7K SATA_DTX_IRX_P1 2 0.01U_0402_16V7K

GND GND

15 14

SANTA_206401-1_13P CONN@

A

A

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc. SCHEMATIC,LA-4201P
Rev I Sheet
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

401551

Date:

Monday, July 21, 2008

25

of

50

5

4

3

2

5

4

3

2

1

MDIO PULL HIGH/LOW ?
+3VS

40mil
0.1U_0402_16V4Z +1.8VS

0.1U_0402_16V4Z

L38 MBK1608121YZF_0603 1 2 @

+1.8VS_APVDD

40mil
1

C534 0.1U_0402_16V4Z ABO@

+3V_MCVCC

1 C547
D

1 C533
ABO@ 2

1 C527
ABO@ 2

1 C545
ABO@ 2

ABO@ 2

1 C549 ABO@ 10U_0805_10V4Z 2

1 C526 ABO@ 0.1U_0402_16V4Z 2 2

1

1
XDWP_SDWP 1 R453 ABO@ XD_RB

2 2

2

2
C546 1000P_0402_50V7K ABO@

10K_0402_5% 10K_0402_5% +3VS

D

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C532 0.1U_0402_16V4Z ABO@

1 R429 ABO@

XD_CLE U34 16 CLK_PCIE_READER# 16 CLK_PCIE_READER 23 PCIE_ITX_C_PRX_N5 23 PCIE_ITX_C_PRX_P5 23 PCIE_PTX_C_IRX_N5 23 PCIE_PTX_C_IRX_P5 PCIE_ITX_C_PRX_N5 PCIE_ITX_C_PRX_P5 ABO@ C530 1 2 C529 1 2 ABO@ 0.1U_0402_16V7K 0.1U_0402_16V7K R443 1 ABO@ PCIE_PTX_IRX_N5 PCIE_PTX_IRX_P5

1 R452 ABO@

2 2 2

10K_0402_5% 4.7K_0402_5% 4.7K_0402_5%

3 4 9 8 11 12 7 38 39

APCLKN APCLKP APRXN APRXP APTXN APTXP APREXT PCIES_EN PCIES

APVDD APV18 TAV33 DV33 DV33 DV33 DV18 DV18 MDIO0 MDIO1 MDIO2 MDIO3 MDIO4 MDIO5 MDIO6 MDIO7 MDIO8 MDIO9 MDIO10 MDIO11 MDIO12 MDIO13 MDIO14 NC NC NC APGND

5 10 30 19 20 44 18 37 48 47 46 45 43 42 41 40 29 28 27 26 25 23 22 34 35 36 6 24 31 32 33
XD_SD_MS_D0 XD_SD_MS_D1 XD_SD_MS_D2 XD_SD_MS_D3 SDCMD_MSBS_XDWE# MDIO5 R535 1 ABO@ XDWP_SDWP XD_CLE XD_D4 XD_D5 XD_D6 XD_D7 XD_RE XD_RB XD_ALE

+1.8VS_APVDD +3VS

XDCD0#_SDCD# 1 R427 ABO@ XDCD1#_MSCD# 1 R430 ABO@

+1.8VS_APVDD

2 8.2K_0402_1%

APREXT

APREXT 12 mil
+3VS

JMB385

XD_RE

1 R436 ABO@ 1 R428 ABO@

2 2

200K_0402_5% 200K_0402_5%
C

2 22_0402_5%

XDCE_SDCLK_MSCLK XD_ALE

C

8,21,23,27,31 PLT_RST# R538 2 0_0402_5% T32 PAD

1 2 13 14 15 16 17 21

XRSTN XTEST SEEDAT SEECLK CR1_CD1N CR1_CD0N CR1_PCTLN CR1_LEDN

23 CR_CPPE#

1

@

@

TP_SEECLK

23 CR_WAKE#

D31 XDCD1#_MSCD# CH751H-40PT_SOD323-2 XDCD0#_SDCD# 1 2 @ @ 1 2 R539 MC_PWREN# 0_0402_5% MC_PWREN# 30 mil 32 5IN1_LED#

D26 XDCD0#_SDCD# XDCD1#_MSCD#

GND GND GND GND

2 1 3

XD_CD# C524 ABO@ 270P_0402_50V7K

DAN202UT106_SC70-3 ABO@

JMB385-LGEZ0B_LQFP48_7X7 ABO@

4 IN 1 Socket Push Type(New)
B

JREAD1

B

Memory Card Power Switch
+3VS U35 +3V_MCVCC

+3V_MCVCC XD_SD_MS_D0 XD_SD_MS_D1 XD_SD_MS_D2 XD_SD_MS_D3 XD_D4 XD_D5 XD_D6 XD_D7 C544 1

3 32 10 9 8 7 6 5 4

XD-VCC XD-D0 XD-D1 XD-D2 XD-D3 XD-D4 XD-D5 XD-D6 XD-D7 XD-WE XD-WP XD-ALE XD-CD XD-R/B XD-RE XD-CE XD-CLE 7IN1 GND 7IN1 GND

SD-VCC MS-VCC

21 28 20 14 12 30 29 27 23 18 16 25 1 2 26 17 15 19 24 22 13

+3V_MCVCC XDCE_SDCLK_MSCLK XD_SD_MS_D0 XD_SD_MS_D1 XD_SD_MS_D2 XD_SD_MS_D3 (MMC XD_D4 (MMC XD_D5 (MMC XD_D6 (MMC XD_D7 SDCMD_MSBS_XDWE# XDCD0#_SDCD# XDWP_SDWP XDCE_SDCLK_MSCLK XD_SD_MS_D0 XD_SD_MS_D1 XD_SD_MS_D2 XD_SD_MS_D3 XDCD1#_MSCD# SDCMD_MSBS_XDWE#

7 IN 1 CONN

MC_PWREN#

1 2 3 4

GND IN IN EN#

OUT OUT OUT FLG

8 7 6 5 1

40mil
C548 1 C543 1

TPS2061DRG4_SO8 R431 @ 300_0603_5% @

ABO@ 4.7U_0805_10V4Z 0.1U_0402_16V4Z 2 2 ABO@ 2 0.1U_0402_16V4Z ABO@ D Q40 2N7002_SOT23 @

1 2

SDCMD_MSBS_XDWE# 34 XDWP_SDWP 33 XD_ALE 35 XD_CD# 40 XD_RB 39 XD_RE 38 XDCE_SDCLK_MSCLK 37 XD_CLE 36

SD_CLK SD-DAT0 SD-DAT1 SD-DAT2 SD-DAT3 SD-DAT4 SD-DAT5 SD-DAT6 SD-DAT7 SD-CMD SD-CD-SW SD-WP-SW MS-SCLK MS-DATA0 MS-DATA1 MS-DATA2 MS-DATA3 MS-INS MS-BS

Data Data Data Data

Bit Bit Bit Bit

4) 5) 6) 7)

MC_PWREN#

2 G 3
S

11 31

41 42
A

7IN1 GND 7IN1 GND
TAITW_R015-B10-LM CONN@
A

MC_PWREN#

1 2 R435 ABO@
C525 ABO@ 4.7U_0805_10V4Z

0_0805_5%

+3V_MCVCC

1

2

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc.
SCHEMATIC,LA-4201P
Rev I Sheet
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

401551

Date:

Monday, July 21, 2008

26

of

50

5

4

3

2

5

4

3

2

1

LAN RTL8111C/8102E
+3V_LAN +3VALW 1 R290 2 0_1206_5% 1 C426 1 C423

60mil
1 C408 1 C387

40mil
+CTRL_18

L1 8111C@ 4.7UH_1008HC-472EJFS-A_5%_1008 1 2 1 R14 8102E@ 0_0805_5% 2 C11 1 C12 1 1 C14 1 C24

+LAN_AVDD18

40mil
1 C25 1 C26

L2 MBK1608121YZF_0603 1 2 1 C27

+1.8V_LAN

20mil
1 C401 1 C407
D

D

0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 2 2 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z

10U_0805_10V4Z 2 2 2 10U_0805_10V4Z 0.1U_0402_16V4Z

0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 2 2 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z

0.1U_0402_16V4Z 2 2 0.1U_0402_16V4Z

+3V_LAN 1

1 R23 0_0805_5% 8111C@ 2

40mil
+CTRL_12 1 C392 8111C@ 0.1U_0402_16V4Z 2 2 1

R19 0_0603_5% 8111C@ 1 R18 8102E@ 0_0805_5% 2 1 C404 1 C418 1

+1.2V_LAN

40mil
C388 1 C398 1 C424 1 C425 1 C417 1 C414

2

C15 8111C@ 10U_0805_10V4Z

0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 2 2 2 2 2 2 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z

+3V_LAN

2 1 LAN_PME# R296 100K_0402_5%

C

Place closed to Chip
23 PCIE_PTX_C_IRX_P3 23 PCIE_PTX_C_IRX_N3 23 PCIE_ITX_C_PRX_P3 23 PCIE_ITX_C_PRX_N3 C415 1 C416 1 2 0.1U_0402_16V7K 2 0.1U_0402_16V7K PCIE_PTX_IRX_P3 PCIE_PTX_IRX_N3 PCIE_ITX_C_PRX_P3 PCIE_ITX_C_PRX_N3 29 30 23 24 33 16 CLK_PCIE_LAN 16 CLK_PCIE_LAN# 8,21,23,26,31 PLT_RST# R297 1 2 0_0402_5% LAN_RESET# +CTRL_18 +LAN_AVDD18 +3V_LAN R292 1 8111C@ 2 0_0603_5% R294 1 ENSR 26 27 20 1 5 62 64

U25 HSOP HSON HSIP HSIN CLKREQB REFCLK_P REFCLK_N PERSTB SROUT12 FB12 ENSR RSET DVDD12 DVDD12 DVDD12 DVDD12 DVDD12 DVDD12 EVDD12 EVDD12 CKTAL1 CKTAL2 VDD33 VDD33 VDD33 VDD33 VDDSR EGND EGND NC NC NC NC NC NC NC NC NC AVDD33 AVDD33 AVDD12 AVDD12 AVDD12 AVDD12 IGPIO OGPIO 16 37 46 53 63 2 59 8 11 14 58 50 51 +3V_LAN MDIP0 MDIN0 MDIP1 MDIN1 MDIP2 MDIN2 MDIP3 MDIN3 3 4 6 7 9 10 12 13 21 32 38 43 49 52 22 28 LAN_MIDI0+ LAN_MIDI0LAN_MIDI1+ LAN_MIDI1LAN_MIDI2+ LAN_MIDI2LAN_MIDI3+ LAN_MIDI3LAN_MIDI0+ LAN_MIDI0LAN_MIDI1+ LAN_MIDI1LAN_MIDI2+ LAN_MIDI2LAN_MIDI3+ LAN_MIDI3+1.2V_LAN 28 28 28 28 28 28 28 28 U26 LAN_DO LAN_DI LAN_SK LAN_CS 4 3 2 1 DO DI SK CS GND NC NC VCC 5 6 7 8 2 C420 @ 0.1U_0402_16V4Z +3V_LAN LED3 LED2 LED1 LED0 54 55 56 57 EEDO EEDI/AUX EESK EECS 45 47 48 44 LAN_DO LAN_DI LAN_SK LAN_CS

C

LAN_LINK# 28 LAN_ACTIVITY# 28

R315 3.6K_0402_5% 1 2

+3V_LAN

1

AT93C46-10SI-2.7_SO8 @

2 2.49K_0402_1%

31 EC_PME#
B

R298 1

2 0_0402_5%

LAN_PME# ISOLATEB LAN_X1

19 36 60 61

LANWAKEB ISOLATEB

B

+3VS 1

+1.8V_LAN

R314 1K_0402_1% 2 ISOLATEB R313 15K_0402_1% 2

LAN_X2

65 25 31 15 17 18 34 35 39 40 41 42

EXPOSE_PAD +CTRL_12 +AVDD33 1 +LAN_AVDD18 +1.2V_LAN +AVDD33 C23 0.1U_0402_16V4Z 1 1 C28 0.1U_0402_16V4Z R15 0_0805_5% 2 2 2 +3V_LAN

1

+1.2V_LAN

Y2 LAN_X1 1 1 2 LAN_X2 1 C397 27P_0402_50V8J 2 25MHZ_20P C400 27P_0402_50V8J

2

RTL8111C-GR_QFN64_9X9 8111C@

Place closed to Pin2 & Pin59
A A

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc.
SCHEMATIC,LA-4201P
Document Number

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2

401551
Monday, July 21, 2008
1

Rev I Sheet 27 of 50

Date:

5

4

3

2

1

LAN RTL8111C/8102E
D

T1 L_LAN_MIDI0+ L_LAN_MIDI0L_LAN_MIDI1+ L_LAN_MIDI1L_LAN_MIDI2+ L_LAN_MIDI2L_LAN_MIDI3+ L_LAN_MIDI3LAN_MIDI0+ LAN_MIDI0LAN_MIDI1+ LAN_MIDI1LAN_MIDI2+ LAN_MIDI2R521 1 JAW50@2 0_0402_5% R522 1 JAW50@2 0_0402_5% R523 1 JAW50@2 0_0402_5% R524 1 JAW50@2 0_0402_5% R525 1 JAW50@2 0_0402_5% R526 1 JAW50@2 0_0402_5% R527 1 JAW50@2 0_0402_5% R528 1 JAW50@2 0_0402_5% R529 1 JAW50@2 0_0402_5% R530 1 JAW50@2 0_0402_5% L_LAN_MIDI0+ RJ45_MIDI3L_LAN_MIDI0RJ45_MIDI3+ RJ45_MIDI1R2 75_0402_1% R3 75_0402_1% RJ45_MIDI2RJ45_MIDI2+ R6 75_0402_1% RJ45_MIDI1+ RJ45_MIDI0RJ45_GND RJ45_MIDI0+ L_LAN_LINK# +3V_LAN R5 LAN_TCT L_LAN_MIDI2+ L_LAN_MIDI2L_LAN_MIDI3+ L_LAN_MIDI3L_LAN_ACTIVITY# L_LAN_LINK#

D

1 2 3 4 5 6 7 8 9 10 11 12

TCT1 TD1+ TD1TCT2 TD2+ TD2TCT3 TD3+ TD3TCT4 TD4+ TD4-

MCT1 MX1+ MX1MCT2 MX2+ MX2MCT3 MX3+ MX3MCT4 MX4+ MX4-

24 23 22 21 20 19 18 17 16 15 14 13

RJ45_MIDI0+ RJ45_MIDI0RJ45_MIDI1+ RJ45_MIDI1RJ45_MIDI2+ RJ45_MIDI2RJ45_MIDI3+ RJ45_MIDI3-

1

2

+3V_LAN

350uH_GSL5009-1 LF

2 1 R1 1K_0402_5% L_LAN_ACTIVITY#

C3 220P_0402_50V7K JRJ45 12 Amber LED+

11 8 7 6 5 4 3 2 1 10

Amber LEDSHLD2 PR4SHLD1 PR4+ PR2PR3PR3+ PR2+ PR1SHLD2 PR1+ SHLD1 Green LEDGreen LED+
FOX_JM36113-L2R8-7F CONN@ 2

16 15

Guide Pin

1
L_LAN_MIDI1+ L_LAN_MIDI1-

2

2

1 1 2

1

C380

1

C379

1

C376

1

C375

R4 75_0402_1%

C

LAN_MIDI3+ LAN_MIDI3LAN_ACTIVITY# LAN_LINK#

2

0.1U_0402_16V4Z 2 2

0.1U_0402_16V4Z 2

2

1

14 13

C

0.1U_0402_16V4Z

0.1U_0402_16V4Z

40mil

2

1 1K_0402_5%

9

Place close to TCT pin
1
+3V_LAN

C9 220P_0402_50V7K

RJ45_GND U1

1

2 1
C2

C4 1000P_1206_2KV7K

56 50 38 27 18 10 4

LANGND 1

40mil

VDD6 VDD5 VDD4 VDD3 VDD2 VDD1 VDD0

27 LAN_MIDI0+ 27 LAN_MIDI027 LAN_MIDI1+ 27 LAN_MIDI127 LAN_MIDI2+ 27 LAN_MIDI227 LAN_MIDI3+ 27 LAN_MIDI3-

LAN_MIDI0+ LAN_MIDI0LAN_MIDI1+ LAN_MIDI1LAN_MIDI2+ LAN_MIDI2LAN_MIDI3+ LAN_MIDI3-

2 3 7 8 11 12 14 15 17 19 20 54 5 57

0B1 1B1 2B1 3B1 4B1 5B1 6B1 7B1 0LED1 1LED1 2LED1 0B2 1B2 2B2 3B2 4B2 5B2 6B2 7B2 0LED2 1LED2 2LED2

48 47 43 42 37 36 32 31 22 23 52 46 45 41 40 35 34 30 29 25 26 51

D_LAN_MIDI0+ D_LAN_MIDI0D_LAN_MIDI1+ D_LAN_MIDI1D_LAN_MIDI2+ D_LAN_MIDI2D_LAN_MIDI3+ D_LAN_MIDI3D_LAN_ACTIVITY# D_LAN_LINK# L_LAN_MIDI0+ L_LAN_MIDI0L_LAN_MIDI1+ L_LAN_MIDI1L_LAN_MIDI2+ L_LAN_MIDI2L_LAN_MIDI3+ L_LAN_MIDI3L_LAN_ACTIVITY# L_LAN_LINK#

D_LAN_MIDI0+ 38 D_LAN_MIDI0- 38 D_LAN_MIDI1+ 38 D_LAN_MIDI1- 38 D_LAN_MIDI2+ 38 D_LAN_MIDI2- 38 D_LAN_MIDI3+ 38 D_LAN_MIDI3- 38 D_LAN_ACTIVITY# D_LAN_LINK# 38 38

2

2

C1 4.7U_0805_10V4Z

A0 A1 A2 A3 A4 A5 A6 A7 SEL LED0 LED1 LED2 NC PAD_GND

0.1U_0402_16V4Z

B

L_LAN_ACTIVITY# 1 2 C5 68P_0402_50V8J @ L_LAN_LINK#

B

1 2 C8 68P_0402_50V8J @

For EMI

31,38 EC_DOCKIN# 27 LAN_ACTIVITY# 27 LAN_LINK# LAN_ACTIVITY# LAN_LINK#

NOTE:

L : A-->B1 H: A-->B2

GND0 GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 GND11 GND12 GND13
PI3L500-AZFEX_TQFN56_11X5 JAL90@

A

1 6 9 13 16 21 24 28 33 39 44 49 53 55

A

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc.
SCHEMATIC,LA-4201P
Document Number

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2

401551
Monday, July 21, 2008 Sheet
1

Rev I 28 of 50

Date:

A

B

C

D

E

For Robson2
+1.5VS +3VS 1 C342 JAL90@ 4.7U_0805_10V4Z 1 C344 JAL90@ 0.1U_0402_16V4Z 1 C312 JAL90@ 0.1U_0402_16V4Z 1 C343 JAL90@ 4.7U_0805_10V4Z 1 C352 JAL90@ 0.1U_0402_16V4Z

Mini Card Power Rating Power +3VS Primary Power (mA) Peak 1000 330 500 +3V
+3VS +1.5VS

Auxiliary Power (mA) Normal
1

2
1

2

2

2

2

Normal 750 250 375

JMINI1 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 G1 G2 G3 G3 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

250 (wake enable) 5 (Not wake enable)

+1.5VS

16 MINI1_CLKREQ# 16 CLK_PCIE_MINI1# 16 CLK_PCIE_MINI1

PLT_RST_BUF#

PLT_RST_BUF# 21

23 PCIE_PTX_C_IRX_N4 23 PCIE_PTX_C_IRX_P4 23 PCIE_ITX_C_PRX_N4 23 PCIE_ITX_C_PRX_P4 +3VS

MINI1_SMBCLK MINI1_SMBDATA

R234 1 R229 1

@ @

2 0_0402_5% ICH_SMBCLK 2 0_0402_5% ICH_SMBDATA

ICH_SMBCLK 16,23,30 ICH_SMBDATA 16,23,30

USB20_N7 23 USB20_P7 23

(LED_WWAN#) (LED_WLAN#)

For MINICARD Port80 Debug
31 E51TXD_P80DATA 31 E51RXD_P80CLK
2

JAL90@ R472 1 2 0_0402_5% CL_RST#1_R

E51TXD_P80DATA E51RXD_P80CLK

2

FOX_AS0B226-S99N-7F CONN@

For Wireless LAN
+3VS_WLAN +1.5VS R487 1 R478 1 @ 2 0_1206_5% 2 0_1206_5%

+3VS_WLAN

+3VS +3V

1

C569 4.7U_0805_10V4Z

1

C347 0.1U_0402_16V4Z

1

C311 0.1U_0402_16V4Z

1

53 54 55 56

C318 4.7U_0805_10V4Z

1

C335 0.1U_0402_16V4Z

1

C345 0.1U_0402_16V4Z

2

2

2

2

2

2

To USB/B Connector
JP11

3

JMINI2 23,30 ICH_PCIE_WAKE# 30 WLAN_BT_DATA 30 WLAN_BT_CLK 16 MINI2_CLKREQ# 16 CLK_PCIE_MINI2# 16 CLK_PCIE_MINI2 R251 1 @ 2 0_0402_5% WLAN_BT_DATA WLAN_BT_CLK 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

80mil
1 2 3 4 5 6 7 8 +5VALW SYSON# 30,37,38 USB20_N4 USB20_P4 USB20_N4 23 USB20_P4 23 USB_OC#4 23 C6

+5VALW

3

(WAKE#)

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

+3VS_WLAN +1.5VS 9 10

1 2 3 GND 4 GND 5 6 7 8

1

4.7U_0805_10V4Z 2

ACES_87212-08G0L CONN@ WL_OFF# PLT_RST_BUF# +3V_WLAN R246 1 R242 1 MINI2_SMBCLK R237 1 MINI2_SMBDATA R230 1 WL_OFF# 31 @ @ @ 2 0_0603_5% 2 0_0603_5% +3VS +3V

23 PCIE_PTX_C_IRX_N2 23 PCIE_PTX_C_IRX_P2 23 PCIE_ITX_C_PRX_N2 23 PCIE_ITX_C_PRX_P2 +3VS_WLAN

2 0_0402_5% ICH_SMBCLK 2 0_0402_5% ICH_SMBDATA

USB20_N8 23 USB20_P8 23

(LED_WWAN#) (LED_WLAN#)

For MINICARD Port80 Debug
E51TXD_P80DATA E51RXD_P80CLK R531 1 2 0_0402_5% CL_RST#2_R

MINI1_LED# 32

(9~16mA)

53 54 55 56

4

G1 G2 G3 G3

FOX_AS0B226-S99N-7F CONN@

4

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc.
SCHEMATIC,LA-4201P
Document Number

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A B C D

401551
Monday, July 21, 2008
E

Rev I Sheet 29 of 50

Date:

A

B

C

D

E

New Card Power Switch
U14 +1.5VS 12 14 2 4 17 6 20 1 1.5Vin 1.5Vin 3.3Vin 3.3Vin AUX_IN SYSRST# SHDN# STBY# CPPE# CPUSB# RCLKEN G577NSR91U_TQFN20_4x4 ABO@ 1.5Vout 1.5Vout 3.3Vout 3.3Vout AUX_OUT OC# PERST# NC GND Thermal_Pad 11 13 3 5 15 19 8 16 7 21 +3VS 1 1 C307 ABO@ 0.1U_0402_16V4Z +3VS PERST1#

New Card Socket (Left/TOP)
+3VALW_CARD +3VS_CARD +1.5VS_CARD

40mil
+1.5VS_CARD

Imax = 0.275A
C292 1 1 C294 C304 1

Imax = 1.35A
1 C303 C281 1

Imax = 0.75A
1 C282 23 USB20_N1 23 USB20_P1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

JEXP1 GND USB_DUSB_D+ CPUSB# RSV RSV SMB_CLK SMB_DATA +1.5V +1.5V WAKE# +3.3VAUX PERST# +3.3V +3.3V CLKREQ# CPPE# REFCLKREFCLK+ GND PERn0 PERp0 GND PETn0 PETp0 GND GND GND GND GND 29 30

60mils
+3VS_CARD

1

+3VS +3V 21 PCI_RST# 31,37,43,44 SYSON 31,33,37,45 SUSP# PCI_RST# SYSON SUSP#

CP_USB#

1

40mil
+3VALW_CARD

10U_0805_10V4Z 2 ABO@

10U_0805_10V4Z 2 2 0.1U_0402_16V4Z ABO@ 2 0.1U_0402_16V4Z ABO@ ABO@

10U_0805_10V4Z 2 ABO@ 2 0.1U_0402_16V4Z ABO@

16,23,29 ICH_SMBCLK 16,23,29 ICH_SMBDATA +1.5VS_CARD 23,29 ICH_PCIE_WAKE# +3VALW_CARD +3VS_CARD 23 CP_PE# 16 CLK_PCIE_CARD# 16 CLK_PCIE_CARD 23 PCIE_PTX_C_IRX_N1 23 PCIE_PTX_C_IRX_P1 CLKREQ1# CP_PE#

PERST1#

CP_PE# 10 (Internal Pull High to AUXIN) CP_USB# 9 (Internal Pull High to AUXIN) RCLKEN1 18

G Vcc

R220 10K_0402_5% ABO@ 2

2 5 CLKREQ1# 2 1 U16 Y 4 B A

EXP_CLKREQ# 16

23 PCIE_ITX_C_PRX_N1 23 PCIE_ITX_C_PRX_P1

1

RCLKEN1 2 G C310 1 C298 1 C283 1 3 S

Q25 2N7002_SOT23 ABO@

3

+3VS

+3V

+1.5VS

D

ABO@ NC7SZ32P5X_NL_SC70-5

FOX_1CH4110C_LT CONN@

10U_0805_10V4Z 2 ABO@
2

10U_0805_10V4Z ABO@ 2

10U_0805_10V4Z ABO@ 2
2

USB CONN. (Stack-up Type) Bluetooth Conn.
+3VALW +3VS

Finger Print Conn.
+USB_VCCA +3V 1 +3VS 1 C523 R578 0_0603_5% 2 +USB_VCCA 1 + 1 C187 C481+ +USB_VCCA

W=80mils
1

+USB_VCCA

W=80mils
1 C217

3

31 BT_ON#

1 C317 ABO@ 0.1U_0402_16V4Z 2

1

1

2

1 1 C308 C325 R235 ABO@ ABO@ 300_0603_5% 4.7U_0805_10V4Z 2 2 ABO@ 0.1U_0402_16V4Z 1 D Q26 2N7002_SOT23 ABO@

3

+USB_VCCA U33 1 2 3 4 GND IN IN EN# OUT OUT OUT FLG 8 7 6 5

1

+BT_VCC JP10 1 2 3 4 5 6 7 8 1 GND 2 3 4 5 6 7 8 GND 9 D25 USB20_P0 6 CH3 CH2 3 USB20_P2 C522 1

2

23 USB20_P5 23 USB20_N5 29 WLAN_BT_DATA 29 WLAN_BT_CLK
4

ACES_87213-0800G CONN@

A

D

1 R222 ABO@

2 10K_0402_5%

2

S

C316 ABO@ 0.1U_0402_16V4Z 2 G G

1

1

3

2

2

C332 ABO@ 1U_0603_10V4Z

R577 0_0603_5% @

220U_C6_6.3V_M_R15 2 2 470P_0402_50V7K JP8 JUSB2 23 USB20_N0 23 USB20_P0 USB20_N0 USB20_P0 1 2 3 4 5 6 7 8 VCC DD+ GND GND1 GND2 GND3 GND4

@ 150U_D2_6.3VM 2 2 470P_0402_50V7K JUSB1 23 USB20_N2 23 USB20_P2 USB20_N2 USB20_P2 1 2 3 4 5 6 7 8 VCC DD+ GND GND1 GND2 GND3 GND4
3

ABO@ Q24 AO3413_SOT23-3

W=40mils
+BT_VCC

C163 0.1U_0402_16V4Z +FP_VCC 2 1 USB20_N10 23 USB20_N10 USB20_P10 23 USB20_P10

6 5 4 3 2 1

G2 G1 4 3 2 1 ACES_85201-04051 CONN@

SUYIN_020173MR004G565ZR CONN@

SUYIN_020173MR004G565ZR CONN@

2 G S

+3V

80mil
+5VALW R169 100K_0402_5% 1 2 R171 10K_0402_5% R170 0_0402_5% 1 2 USB_OC#2 23 USB_OC#0 23 1 C240 0.1U_0402_16V4Z
4

TPS2061DRG4_SO8 +USB_VCCA 10 USB20_N2 4 CH4 CH1 1 USB20_N0 29,37,38 SYSON# 5 Vp Vn 2 4.7U_0805_10V4Z 2

2

@ CM1293-04SO_SOT23-6

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc.
SCHEMATIC,LA-4201P
Document Number

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B C D

401551
Monday, July 21, 2008
E

Rev I Sheet 30 of 50

Date:

5

4

3

2

1

+3VALW L13

For EC Tools
+3VALW JP13

1
+3VALW

C284

0.1U_0402_16V4Z 1 C299 1

0.1U_0402_16V4Z 1 2 C319 C277

1 2 +EC_VCCA 2 FBM-L11-160808-800LMT_0603
C268 1000P_0402_50V7K ECAGND

Place on RAM door
E51RXD_P80CLK 29 E51TXD_P80DATA 29

1 R203

EC_PME# 2 10K_0402_5% @

2 2 0.1U_0402_16V4Z

2 2 0.1U_0402_16V4Z

C267 1000P_0402_50V7K 1 1

1
C302

KSI[0..7] KSO[0..17]

KSI[0..7] 32 KSO[0..17] 32

2

0.1U_0402_16V4Z

1 2 3 4

1 2 3 4

E51RXD_P80CLK E51TXD_P80DATA

ACES_85205-0400 @ JP9

D

+3VALW

Place on MiniCard

D

9 22 33 96 111 125

67

U13

AVCC

1 2 3 4 21 23 26 27 63 64 65 66 75 76 68 70 71 72 83 84 85 86 87 88 97 98 99 109 119 120 126 128 73 74 89 90 91 92 93 95 121 127 100 101 102 103 104 105 106 107 108 110 112 114 115 116 117 118 124 1
C269 INVT_PWM BEEP# INVT_PWM 18 BEEP# 34 ENCODER_DIR 35 ACOFF 42 ECAGND 2 1 C322 0.01U_0402_16V7K BATT_OVP 42 ADP_I 42 PGD_IN 46 DAC_BRIG EN_DFAN1 IREF DAC_BRIG 18 EN_DFAN1 36 IREF 42 CALIBRATE# 42 EC_MUTE 35 EC_I2C_INT1 32 DOCKIN# 38 BT_LED# 32 TP_CLK 32 TP_DATA 32 3S/4S# 42 65W/90W# 42 SBPWR_EN 37,44 BATT_TEMP 40

VCC VCC VCC VCC VCC VCC

1 2 3 4

E51RXD_P80CLK E51TXD_P80DATA

C291 @ 22P_0402_50V8J 2 1

R196 2

22 EC_GA20 22 EC_KBRST# 23 SERIRQ 22 LPC_FRAME# 22 LPC_AD3 22 LPC_AD2 1 @ 33_0402_5% 22 LPC_AD1 22 LPC_AD0 8,21,23,26,27 PLT_RST#

LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

1 2 3 4 5 7 8 10 12 13 37 20 38

GA20/GPIO00 KBRST#/GPIO01 SERIRQ# LFRAME# LAD3 LAD2 LAD1 LAD0 LPC & MISC PCICLK PCIRST#/GPIO05 ECRST# SCI#/GPIO0E CLKRUN#/GPIO1D

INVT_PWM/PWM1/GPIO0F BEEP#/PWM2/GPIO10 FANPWM1/GPIO12 ACOFF/FANPWM2/GPIO13

ACES_85205-0400 @

3S/4S#

PWM Output AD
BATT_TEMP/AD0/GPIO38 BATT_OVP/AD1/GPIO39 ADP_I/AD2/GPIO3A Input AD3/GPIO3B AD4/GPIO42 SELIO2#/AD5/GPIO43 DAC_BRIG/DA0/GPIO3C EN_DFAN1/DA1/GPIO3D IREF/DA2/GPIO3E DA3/GPIO3F

1 R188

2 4.7K_0402_5%

BATT_TEMP BATT_OVP AD_BID0

16 CLK_PCI_LPC 23 EC_SCI# 23 PM_CLKRUN# EC_SCI#

+3VALW

+3VALW

2 1 R223 47K_0402_5% 2 1 C320 0.1U_0402_16V4Z

+3VALW
C

R209 10K_0402_5%

D13 33 RCIRRX

1

2

EC_RCIRRX

CH751H-40PT_SOD323-2 +5VS

1 R195 1 R194

2 TP_CLK 4.7K_0402_5% 2 TP_DATA 4.7K_0402_5%

1

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17 EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

DA Output
55 56 57 58 59 60 61 62 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 81 82 77 78 79 80 KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37 KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24 KSO5/GPIO25 Int. K/B KSO6/GPIO26 Matrix KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49 SCL1/GPIO44 SDA1/GPIO45 SCL2/GPIO46 SDA2/GPIO47

ID_JAL90_JAW50# 2 1 R186 JAL90@ 100K_0402_5% 2 1 R540 JAW50@ 100K_0402_5%

PS2 Interface

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C PSDAT2/GPIO4D TP_CLK/PSCLK3/GPIO4E TP_DATA/PSDAT3/GPIO4F SDICS#/GPXOA00 SDICLK/GPXOA01 SDIDO/GPXOA02 SDIDI/GPXID0 SPIDI/RD# SPIDO/WR# SPICLK/GPIO58 SPICS#

EC_MUTE

C

+3VALW 65W/90W# 2 R187

2

TP_CLK TP_DATA 3S/4S# 65W/90W# SBPWR_EN ID_JAL90_JAW50# EC_SPIDI/FWR# EC_SPIDO/FRD# EC_SPICLK EC_SPICS#/FSEL# EC_RCIRRX FSTCHG BATT_GRN_LED# CAPS_LED# BATT_AMB_LED# PWR_LED SYSON VR_ON ACIN

1 100K_0402_5%

1

SPI Device Interface SPI Flash ROM

Analog Board ID definition, Please see page 3.
+3VALW

EC_SI_SPI_SO 32 EC_SO_SPI_SI 32 EC_SPICLK 32 EC_SPICS#/FSEL# 32

2

+3VALW
B

17,40 17,40 4,32 4,32

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

GPIO SM Bus

1 R206 1 R207

2 EC_SMB_CK1 2.2K_0402_5% 2 EC_SMB_DA1 2.2K_0402_5%

CIR_RX/GPIO40 CIR_RLC_TX/GPIO41 FSTCHG/SELIO#/GPIO50 BATT_CHGI_LED#/GPIO52 CAPS_LED#/GPIO53 BATT_LOW_LED#/GPIO54 SUSP_LED#/GPIO55 SYSON/GPIO56 VR_ON/XCLK32K/GPIO57 AC_IN/GPIO59

Ra
ENCODER_PULSE 35 FSTCHG 42 BATT_GRN_LED# 32 CAPS_LED# 32 BATT_AMB_LED# 32 PWR_LED 32 SYSON 30,37,43,44 VR_ON 33,46 ACIN 23,32,39,42 EC_RSMRST# 23 EC_LID_OUT# 23 EC_ON 33 EC_SWI# 23 EC_PWROK 23,33 BKOFF# 18 WL_OFF# 29 EC_ACIN 17 EC_DOCKIN# 28,38 PM_SLP_S4# 23 ENBKL 10,17 EAPD 34 EC_THERM# 23 SUSP# 30,33,37,45 PBTN_OUT# 23 ARCADE# 32

R218 100K_0402_5% AD_BID0

2

Rb
1

1 R215 C306 ABO@ 33K_0402_5% 2 0.1U_0402_16V4Z
B

23 PM_SLP_S3# 23 PM_SLP_S5# 23 EC_SMI# 32 LID_SW# 27 EC_PME# 8 MCH_TSATN_EC# 36 FAN_SPEED1 30 BT_ON# 33 ON/OFF 32 PWR_SUSP_LED 32 NUM_LED#

1

NC

GPI

1 R200 1 R201

2 EC_SMB_CK2 2.2K_0402_5% 2 EC_SMB_DA2 2.2K_0402_5%

SUSP# PBTN_OUT#

2

EC_CRY1 EC_CRY2

122 123

XCLK1 XCLK0 AGND GND GND GND GND GND

V18R

X2 32.768KHZ_12.5P_MC-306

For KB926 C0 reversion
C323 BATT_TEMP 2 C324 BATT_OVP 2 C276 ACIN 2 100P_0402_50V8J 1 100P_0402_50V8J 1 100P_0402_50V8J 1

+3VS

11 24 35 94 113

69

KB926QFC0_LQFP128_14X14 L12 ECAGND 2 1 FBM-L11-160808-800LMT_0603

2

4.7U_0805_10V4Z

A

32 EC_ESB_CK 32 EC_ESB_DA

1 R560 1 R561 1 R558 1 R559

2 4.7K_0402_5% JAL90GM@ 2 4.7K_0402_5% @ 2 0_0402_5% @ 2 0_0402_5%
JAL90GM@ 2 0_0402_5% JAL90GM@ 2 0_0402_5%

@

20mil

3

NC

+3VS

FAN_SPEED1 BT_ON# E51TXD_P80DATA E51RXD_P80CLK ON/OFF PWR_SUSP_LED NUM_LED#

PM_SLP_S4#/GPXID1 ENBKL/GPXID2 GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

ENBKL EAPD

OUT

15P_0402_50V8J 2

4

1 R198

2 LID_SW# 100K_0402_5%

PM_SLP_S3# PM_SLP_S5# EC_SMI# LID_SW# EC_GPIOB EC_GPIOC EC_PME#

6 14 15 16 17 18 19 25 28 29 30 31 32 34 36

PM_SLP_S3#/GPIO04 PM_SLP_S5#/GPIO07 EC_SMI#/GPIO08 LID_SW#/GPIO0A SUSP#/GPIO0B PBTN_OUT#/GPIO0C GPIO EC_PME#/GPIO0D EC_THERM#/GPIO11 FAN_SPEED1/FANFB1/GPIO14 FANFB2/GPIO15 EC_TX/GPIO16 EC_RX/GPIO17 ON_OFF/GPIO18 PWR_LED#/GPIO19 NUMLED#/GPIO1A

IN

EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04 EC_ON/GPXO05 EC_SWI#/GPXO06 ICH_PWROK/GPXO06 GPO BKOFF#/GPXO08 WL_OFF#/GPXO09 GPXO10 GPXO11

EC_LID_OUT# EC_ON EC_PWROK BKOFF# WL_OFF#

EC_CRY1 C271

EC_CRY2

1

1

C270

15P_0402_50V8J 2

A

EC_GPIOB EC_GPIOC

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc. SCHEMATIC,LA-4201P
Document Number Rev I Sheet
1

17,20 DVI_DET 20 EC_DVI_DET

R555 R550
5

1 1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4 3 2

401551
Monday, July 21, 2008 31 of 50

Date:

U19 +3VALW 1 R224 2 0_0603_5% C326 1 2 0.1U_0402_16V4Z EC_SPICS#/FSEL# SPI_WP# SPI_HOLD# 1 3 7 4 CS# WP# HOLD# GND VCC SCLK SI SO 8 6 5 2 +SPI_VCC EC_SPICLK_R EC_SO_SPI_SI EC_SI_SPI_SO

To TP/B Conn.
JP7 +5VS 31 TP_CLK 31 TP_DATA TP_CLK TP_DATA LEFT_BTN# RIGHT_BTN# 6 5 4 3 2 1 6 5 4 3 2 1 8 7 8 7

+SPI_VCC U18 31 EC_SPICS#/FSEL# +3VALW R248 1 R225 1 EC_SPICS#/FSEL# 2 4.7K_0402_5% SPI_WP# 2 4.7K_0402_5% SPI_HOLD# 1 3 7 4 CE# WP# HOLD# VSS VDD SCK SI SO 8 6 5 2 EC_SPICLK_R R226 1 R227 1 R247 1 2 0_0402_5% 2 0_0402_5% 2 0_0402_5% EC_SPICLK 31 EC_SO_SPI_SI 31 EC_SI_SPI_SO 31

MX25L512AMC-12G_SO8 @

Reserved for BIOS simulator. Footprint SO8

C148 100P_0402_50V8J

1

1 C145 100P_0402_50V8J

ACES_85201-0605 CONN@

MX25L8005M2C-15G_SOP8

2

2

To Media/B Conn.
ENE suggestion SPI Frequency over 66MHz SST: 50MHz MXIC: 70MHz ST: 40MHz
KSI[0..7] KSO[0..17] 31 EC_ESB_CK 31 EC_ESB_DA 4,31 EC_SMB_CK2 4,31 EC_SMB_DA2 2 R563 R564 R565 1 1 1 @ +5VS +3VS C147 JP2 2 0_0402_5% 2 0_0402_5% MEDIA_CK MEDIA_DA 6 5 4 3 2 1 6 5 4 3 2 1 8 7 8 7 0.1U_0402_16V4Z 1 3 R562 1 @ 2 0_0402_5% 2 0_0402_5% +5VS

TP_CLK TP_DATA

D7 @ PSOT24C_SOT23

INT_KBD Conn.
JP4

31 EC_I2C_INT1 KSI[0..7] 31 KSO[0..17] 31

ACES_85201-0605 CONN@

LEFT_BTN# 3 4

SW2 SMT1-05-A_4P 1 2 5 6

RIGHT_BTN#3 4

SW3 SMT1-05-A_4P 1 2 5 6

(Left)

(Right)

G17 G18

R183 10K_0402_5% 2

1

KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17 KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7

26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

KSO0 G2 KSO1 G1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17 KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7

28 27

To LED/B Conn. (POWER/B)
D 1 Q37 AO3413_SOT23-3 +5VS_LED KAL20@ +5VALW S 3

+5VS +5VS

1 JAL9050@ 2 R572 0_0402_5% 1 1 PWR_SUSP_LED# R575 10K_0402_5% KAL20@ 2 BT_LED Q54B 2N7002DW-T/R7_SOT363-6 KAL20@ 5 BT_LED# Q12A 2N7002DW-T/R7_SOT363-6 31 PWR_LED +3VALW 1 JAL90@ 2 ARCADE_BTN# R570 0_0402_5% 1 KAL20@ 2 MINI1_LED# R571 0_0402_5% 1 2 6 31 PWR_SUSP_LED 1 R184 PWR_LED# 10K_0402_5% 2 5 4 3 Q12B 2N7002DW-T/R7_SOT363-6 R576 10K_0402_5% KAL20@ 2 6 1 LID_SW# 31 MEDIA_LED# PWR_LED# PWR_SUSP_LED# ACIN# LID_SW# Q54A 2N7002DW-T/R7_SOT363-6 NUM_LED# 31 KAL20@ CAPS_LED# 31 BT_LED 2 ON/OFFBTN# 33

JP6 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

2 G

17 18 KSO16 C596 1 KSO17 C597 1 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J KSO0

4

3

ACES_88747-2601 CONN@

ACES_85201-16051 CONN@

1 R185 D12 ARCADE_BTN# 2 1 3 51ON#

+3VALW 2 100K_0402_5% ARCADE# 31 51ON# 33,39

KSO15 KSO14 KSO13 KSO12 KSI0 KSO11 KSO10 KSI1 KSI2 KSO9 KSI3 KSO8

C48 C47 C46 C45 C49 C44 C43 C50 C51 C42 C52 C41

1 1 1 1 1 1 1 1 1 1 1 1

2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J

KSO7 KSO6 KSO5 KSO4 KSO3 KSI4 KSO2 KSO1 KSO0 KSI5 KSI6 KSI7

C40 C39 C38 C37 C36 C53 C35 C34 C33 C54 C55 C56

1 1 1 1 1 1 1 1 1 1 1 1

To BTN/B Conn.
KSO0 KSI1 KSI2 KSI3 KSI4 KSI5 WL_BTN# BT_BTN# EMAIL_BTN# IE_BTN# E-KEY_BTN#

ACIN# JP5 1 2 3 4 5 6 7 8 9 10 11 12 ACES_85201-1205 CONN@ MINI1_LED# KSI1 KSI4 KSO0 KSI2 BT_LED# KSI3 +5VS +3VS MINI1_LED# 29 D Q15 JAL90@ 2N7002_SOT23 S 1

DAN202UT106_SC70-3 +3VS Q45A 2N7002DW-T/R7_SOT363-6 6 3 MEDIA_LED# 2 26 5IN1_LED# 22 SATA_LED# SATA_LED# 1 4 +3VS

2 G

ACIN 23,31,39,42

BT_LED# 31

3

Q45B 2N7002DW-T/R7_SOT363-6

3 4

SW1 SMT1-05-A_4P 1 2 5 6 JAL90@

+3VS KSI5 R556 10K_0402_5% @2 1

PWR_LED# ON/OFFBTN# MINI1_LED# BT_LED#

C89 C87 C74 C79

1 1 1 1 1 1 1 1 1 1

2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J KSI5 C373 1 2 @ 100P_0402_50V8J

FOR EMI

(E-KEY_BTN#)
R268 4.99K_0402_1% 1 JAL90@ 2 R266 1 JAL90@ 2 4.99K_0402_1% LED1
YG

KSI5 KSO0 3

PWR_SUSP_LED#C88 KSO0 2 KSI1 KSI2 KSI3 1 KSI4 C80 C81 C82 C83 C84

ARCADE_BTN# C86 NUM_LED# CAPS_LED# MEDIA_LED# C91 C92 C90

5 1 1 1 1 D29 SM05T1G_SOT23-3 @ For ESD 10/31

Compal Footprint
4 3 2 1

+5VALW +5VALW

3 4

1

PWR_LED# KSO0

SW4 SMT1-05-A_4P 3 1 4 5 6 2 JAW50@

2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J 2 @ 100P_0402_50V8J

KSI5

2 PWR_SUSP_LED#

HT-297UD/CB _BLUE/AMB_0603 JAL90@ R269 1.69K_0402_1% 1 2 R267 1 2 2.49K_0402_1% LED2
YG

+5VALW +5VALW

3 4

HT-297DQ/GQ_AMB/YG_0603

A A

(E-KEY_BTN#)

1 BATT_GRN_LED# 2 BATT_AMB_LED#

BATT_GRN_LED# 31 BATT_AMB_LED# 31

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc. SCHEMATIC,LA-4201P
Document Number Rev I Sheet 32 of 50

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

401551
Monday, July 21, 2008

Date:

A

B

C

D

E

Power Button
ON/OFF switch
TOP Side
1

HDA MDC Conn.
+3V +3VALW JMDC1 2 2 @ 10K_0603_5% 2 @ 10K_0603_5% D14 2 1 3 DAN202UT106_SC70-3 51ON# 1 1 3 5 7 9 11 GND1 RES0 IAC_SDATA_OUT RES1 GND2 3.3V IAC_SYNC GND3 IAC_SDATA_IN GND4 IAC_RESET# IAC_BITCLK GND GND GND GND GND GND 2 4 6 8 10 12 GLPM@ 1 +3V +1.5V 2

R254 R493

1 1

15mil
+MDC_VCC

R236 100K_0402_5%

22 HDA_SDOUT_MDC 22 HDA_SYNC_MDC 22 HDA_SDIN1 22 HDA_RST_MDC# ON/OFF 31 51ON# 32,39 1 2 HDA_SDIN1_MDC 33_0402_5%

1 R252 1 R250 +3V

2 0_0402_5% 2 0_0402_5% JAL90GM@

C351 1U_0603_10V4Z
1

Bottom Side
32 ON/OFFBTN# ON/OFFBTN#

R249

HDA_BITCLK_MDC 22 1 R253 0_0402_5%

ACES_88018-124G CONN@

13 14 15 16 17 18

2 1 C346 22P_0402_50V8J 2

Connector for MDC Rev1.5
C334 2 1 D16 RLZ20A_LL34 2 1000P_0402_50V7K 1

For EMI

1 31 EC_ON EC_ON 2 R238 10K_0402_5% 1
2

D Q29

2 G 3

S 2N7002_SOT23

2

Power ON Circuit
+3VS +3VALW 1 +3VALW

P

2

P

D15 31,46 VR_ON 1 2

R243 180K_0402_5% @

14

14

U17A SN74LVC14APWLE_TSSOP14

U17B SN74LVC14APWLE_TSSOP14 SYS_PWROK

1 2

I G 7

O

2

3

I G 7

O

4

1 R244

2 @ 0_0402_5%

EC_PWROK 23,31

CH751H-40PT_SOD323-2 @ C340 1U_0603_10V6K @
3

For South Bridge
3

1

+3VS +3VALW 1 +3VALW +RTCBATT U17C SN74LVC14APWLE_TSSOP14 O G 7 6 9 I G 7 U17D SN74LVC14APWLE_TSSOP14 O 8 VS_ON 43 +3VALW 1

30,31,37,45 SUSP# 37,45 SUSP

R557 10K_0402_1% 1 2 1 D 2 G Q28 2N7002_SOT23 SUSP

P

2

P

2 R432 1K_0402_5% 1 1 2 D27 1 C593 JAL90@ 1000P_0402_50V7K BAS40-04_SOT23-3 1 +CHGRTC C528 0.1U_0402_16V4Z 2 2 3 4 2 RCIRRX RCIRRX 31 +RTCVCC

R245 10K_0402_1% @ 5 2 C338 0.1U_0402_16V7K 3 S I

14

14

CIR

For +VCCP/+1.05VS

1

R512 100_0805_5% JAL90@ 2 IR1 3 1 Vs GND OUT GND

+3VS +3VALW 1 1 14 C314 +3VALW C592 JAL90@ 4.7U_0805_10V4Z

1

R217 31.6K_0402_1% PM@ 2 11 1
4

2 0.1U_0402_16V4Z U17F SN74LVC14APWLE_TSSOP14 O G 7 12 VGA_ON 17 14

TSOP36236TR_4P JAL90@

2

U17E SN74LVC14APWLE_TSSOP14 O 10 13 I

P

I G 7

D

P

2 G Q22 2N7002_SOT23 PM@

SUSP

2 C313 1U_0603_10V6K PM@ 1

4

3

S

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc.
SCHEMATIC,LA-4201P
Document Number

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A B C D

401551
Monday, July 21, 2008
E

Rev I Sheet 33 of 50

Date:

A

B

C

D

E

F

G

H

+VDDA +5VAMP 1 R498 10K_0402_5% 2 +5VS L45 1 2 KC FBM-L11-201209-221LMAT_0805 1 1 L43 1 C566 C565 2 KC FBM-L11-201209-221LMAT_0805 10U_0805_10V4Z 2 2 0.1U_0402_16V4Z

60mil
1 2 3

U37 IN OUT GND SHDN BYP 4 1 C575 5

(output = 300 mA)

40mil
1 C568

+VDDA

4.75V

1

C585

1

2 1U_0402_6.3V4Z

G9191-475T1U_SOT23-5

2

4.7U_0805_10V4Z

R497 10K_0402_5%
1

2

1

2

C587 1 1U_0402_6.3V4Z 2 MONO_IN

31 BEEP#

C595 1 1U_0402_6.3V4Z

2

1

R515

C 2 2 B

Q42 3 E

1 R496

2 1.3K_0402_1%

560_0402_5%

2SC2411K_SOT23

BOM Option ALC268 ALC888S-VB ALC888S-VC

0.01U_0402_16V7K

268@ 888VB@ 888VC@
L46 MBK1608121YZF_0603 1 2 1

23 SB_SPKR

1

1

C594 1 1U_0402_6.3V4Z

2

1

R514

2 D28 CH751H-40PT_SOD323-2 2 2

1

560_0402_5% R513 10K_0402_5%

HD Audio Codec

10mil
1 C586

+3VS_DVDD 1 C589

+3VS

2 L47 MBK1608121YZF_0603 1 2 JAL90GM@

0.1U_0402_16V4Z 2 2 10U_0805_10V4Z +AVDD_HDA

R508 0_0603_5% GLPM@

10mil
1 C588

+1.5VS_DVDD 1 C591

+VDDA

L44 1 2 FBM-L11-160808-800LMT_0603 C572 10U_0805_10V4Z

1

0.1U_0402_16V4Z 1 C580 2

40mil
25 38

+1.5VS

2

0.1U_0402_16V4Z 10U_0805_10V4Z 2 2 1 DVDD DVDD_IO 9

2

2

U38

AVDD1

AVDD2

MIC2_VREFO

15 INT_MIC_R LINE_L C577 LINE_R C570 C583 C582 35 LINE_L 35 LINE_R 1 1 1 1 MIC2_C_L 16 2 268@ 4.7U_0805_6.3V6K MIC2_C_R 17 2 268@ 4.7U_0805_6.3V6K LINE_C_L 23 2 4.7U_0805_6.3V6K LINE_C_R 24 2 4.7U_0805_6.3V6K 18 20 19 35 MIC1_L 35 MIC1_R MIC1_L C581 MIC1_R C579 1 1 2 2 MIC1_C_L 21 4.7U_0805_6.3V6K MIC1_C_R 22 4.7U_0805_6.3V6K MONO_IN 12 11 10 5 2 3 13 34 47 2SPDIF_R 48 0_0402_5% 4 7

LINE2-R MIC2_L MIC2_R LINE1_L LINE1_R CD_L CD_R CD_GND

FRONT_R SURR_L SURR_R SIDE_L SIDE_R CENTER LFE BITCLK

36 39 41 45 46 43 44 6 8 37 29 31 28 32 30 27 40

AMP_RIGHT HP_LEFT HP_RIGHT

1

14

LINE2-L

FRONT_L

35

AMP_LEFT

AMP_LEFT 35 AMP_RIGHT 35 HP_LEFT 35 HP_RIGHT 35

For EMI 5/14

15mil
2

R445 2.2K_0402_5% 268@

DMIC_CLK_268

For EMI
1 R500

1 R490

2 @

DMIC_CLK 0_0402_5%

DMIC_CLK_R INT_MIC_R R442 268@ FBM-11-160808-700T_0603 DMIC_DATA_R 1 R439 268@ FBM-11-160808-700T_0603 C535 268@ 220P_0402_50V7K 2

2 1 0_0402_5%

2 C590 22P_0402_50V8J HDA_BITCLK_AUDIO 22

MIC1_L MIC1_R PCBEEP RESET# LINE2_VREFO SYNC MIC1_VREFO_L SDATA_OUT MIC1_VREFO_R SPDIFO2 GPIO0/DMIC_CLK MIC2_VREFO SENSE A SENSE B VREF SPDIFI/EAPD SPDIFO GPIO1/DMIC_DATA DVSS JDREF SENSE C AVSS1 AVSS2 SDATA_IN PIN37_VREFO LINE1_VREFO HDA_SDIN0_AUDIO 1 R501 2 33_0402_5% HDA_SDIN0 22

Digital MIC
+3VS JP1 1 2 3 4 1 2 3 4
3

3

22 HDA_RST_AUDIO# 22 HDA_SYNC_AUDIO

DMIC_CLK

10mil
MIC1_VREFO_L MIC1_VREFO_R

Place close to Codec
35,38 HP_PLUG# 35,38 LINEIN_PLUG# 35,38 MIC_PLUG# R492 2 R494 1 R495 2 1 39.2K_0402_1% 2 10K_0402_1% 1 20K_0402_1%

22 HDA_SDOUT_AUDIO HDA_GPIO0 HDA_GPIO3 SENSE_A

DMIC_CLK_R R441 888VC@ 0_0603_5% DMIC_DATA DMIC_DATA_R R438 888VC@ 0_0603_5% 3 2

G1 G2

5 6

ACES_88266-04001 CONN@ 1 2 C603 220P_0402_50V8J JAL90@

MIC2_VREFO CODEC_VREF

10mil
C574 1 1 C571 10U_0805_10V4Z

D17 SM05T1G_SOT23-3 @

31 EAPD 35,38 SPDIF 1 R491 2 888VC@ 0_0402_5% 2 888VB@ 0_0402_5% 2 268@ 0_0402_5%

1

33 26 42 2

Sense Pin

Impedance
39.2K

Codec Signals
PORT-A (PIN 39, 41) PORT-B (PIN 21, 22) PORT-C (PIN 23, 24) PORT-D (PIN 35, 36) PORT-E (PIN 14, 15) PORT-F (PIN 16, 17) PORT-G (PIN 43, 44)

DMIC_DATA 1 R499 1 R504 1 R505

0.1U_0402_16V4Z 2 2 R488 20K_0402_1%

For ESD 10/11

2 1

1

C604 220P_0402_50V8J JAL90@

ALC888S-VC_LQFP48_7x7 888VC@

1 R433

2 0_0805_5%

1 R479

2 0_0805_5%

DGND

AGND

1 R446

2 0_0805_5%

1 R489

2 0_0805_5%

SENSE A

20K 10K 5.1K

17 SPDIF_HDMI

DMIC_DATA 1 R506 SPDIF_HDMI 1 R502 DMIC_DATA 1 R507 DMIC_CLK 1 R503

HDA_GPIO0 2 @ 0_0402_5% 2 888VC@ 0_0402_5% HDA_GPIO3 2 888VB@ 0_0402_5% 2 888VC@ FBMA-L10-160808-301LMT_0603

1 R458

2 0_0805_5%

1 R509

2 0_0805_5%

4

39.2K SENSE B 20K 10K 5.1K

GND

GNDA

GND

GNDA

4

For EMI
Security Classification

Compal Secret Data
2007/09/20 Deciphered Date 2008/09/20
Title

Compal Electronics, Inc. SCHEMATIC,LA-4201P
Document Number Rev I Sheet 34
H

PORT-H (PIN 45, 46)

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A B C D E F

401551
Monday, July 21, 2008
G

Date:

of

50

A

B

C

D

E

+5VAMP

W=40mil
+3VS 1 1 C559 0.47U_0603_16V4Z 1 2 C542 0.1U_0402_16V4Z 2 2 2 AMP_RIGHT_C 1U_0402_6.3V4Z AMP_LEFT_C 1U_0402_6.3V4Z 11 19 20 10 1 1 C541 C536 0.1U_0402_16V4Z 2 2 4.7U_0805_10V4Z

20mil
SPKL+ SPKLSPKR+ SPKRR9 R11 R26 R28 1 1 1 1 2 2 2 2

Int. Speaker Conn.
JP3 0_0603_5% 0_0603_5% 0_0603_5% 0_0603_5% 3 2 3 2 SPK_L+ SPK_LSPK_R+ SPK_R1 2 3 4 1 2 3 4 G1 G2 5 6

34 AMP_RIGHT 34 AMP_LEFT
1

CVDD

HVDD

1

2.2K_0402_5% 2 2

2.2K_0402_5% R450 1 +5VAMP R451 1 2 2 2 100K_0402_5% 2 100K_0402_5%

3 5 27 24 4 6 26 28 1 12 14 25 C537 1

HPF Fc = 154Hz

INR_A INL_A /AMP EN HP EN INR_H INL_H /SD

ROUT+ ROUTLOUT+ LOUTHP_R HP_L

22 21 8 9 17 18

SPKR+ SPKRSPKL+ SPKLHPOUT_R HPOUT_L +5VAMP +5VAMP

+5VAMP 1

34 HP_RIGHT 34 HP_LEFT

R449 43K_0402_1% 2

CVSS BEEP VSS CP+ CPBIAS GND PGND PGND CGND GND

2

16 1 2 23 7 13 29 C539 1U_0603_10V4Z Q43 AO3413_SOT23-3 JAL90@ 3 G S S 2

R511 100K_0402_5% 6 1 R510 100K_0402_5% 5

3

15

2

HP_RIGHT 1 C560 HP_LEFT 1 C561

2 2

HP_RIGHT_C 1 4.7U_0805_6.3V6K R468 HP_LEFT_C 1 4.7U_0805_6.3V6K R469

HP_RIGHT_R 39K_0402_5% HP_LEFT_R 39K_0402_5% VOL_AMP

1

AMP_RIGHT_C-1 1 C554 AMP_LEFT_C-1 1 2 1 C563 C555 0.47U_0603_16V4Z R473 R467 1 1

ACES_88266-04001 CONN@ D3 SM05T1G_SOT23-3 @
1

U36

PVDD PVDD

VDD

D1 SM05T1G_SOT23-3 @

For ESD 10/11

HP_PLUG#

HP_PLUG# 34,38

Q44B 2N7002DW-T/R7_SOT363-6 4

VOL_AMP D 1 R447 100K_0402_1% 2 1 3 C540 S 1 2 EC_MUTE G Q41 2N7002_SOT23

C556 1U_0603_10V4Z 2 EC_MUTE 31

2

1

SPDIF_PLUG# 3 2

APA2057A_TSSOP28 1 D D +5VSPDIF 2.2U_0805_10V6K 2

2 1

Q44A 2N7002DW-T/R7_SOT363-6

2 0.01U_0402_16V7K

D32 PJDLC05_SOT23-3

S/PDIF Out JACK LINE Out/Headphone Out
2 2 C557 JHP1 1 2 6 3 SPDIF_PLUG# SPDIF 1 5 4 7 8 10 9 2 SINGA_2SJ-E373-T01 CONN@
2

20mil

Gain= 10dB
2

C567

For ESD Protect

1

For Docking
38 D_HPOUT_L 38 D_HPOUT_R D_HPOUT_L D_HPOUT_R R485 1 JAL90@ 2 56.2_0603_1% HPOUT_L R476 1 2 56.2_0603_1% HPOUT_R JAL90@

R486 56.2_0603_1% HPOUT_L 1 HPOUT_L_1 1 2 L42 HPOUT_R 1 HPOUT_R_1 1 2 L41 R477 56.2_0603_1%

330P_0402_50V7K 330P_0402_50V7K 1 1

HPOUT_L_2 2 FBM-11-160808-700T_0603 HPOUT_R_2 2 FBM-11-160808-700T_0603

34,38 SPDIF +5VSPDIF D_LINE_L D_LINE_R R457 1 JAL90@ 2 0_0603_5% R460 1 JAL90@ 2 0_0603_5% LINE_L LINE_R C584 100P_0402_50V8J

38 D_LINE_L 38 D_LINE_R

38 D_MIC_L 38 D_MIC_R

D_MIC_L D_MIC_R

R440 1 JAL90@ 2 0_0603_5% R444 1 JAL90@ 2 0_0603_5%

MIC1_L MIC1_R

LINE-IN JACK
JLINE1 8 7

38 AUDIO_GNDA
3

R434 1 JAL90@ 2 0_0603_5% 34,38 LINEIN_PLUG# R551 75_0603_1% 1 JAL90@ 2 1 JAL90@ 2 R552 75_0603_1% L40 FBM-11-160808-700T_0603 LINE_R_1 1 2 LINE_L_1 1 2 L39 FBM-11-160808-700T_0603 1 C550 220P_0402_50V7K R265 100K_0402_5% JAL90@ 2 +3VS C358 0.1U_0402_16V4Z JAL90@ 1 2 3 4 5 6 7 U22 CD1# D1 CP1 SD1# Q1 Q1# GND VCC CD2# D2 CP2 SD2# Q2 Q2# 14 13 12 11 10 09 08

LINEIN_PLUG#

5 4
3

34 LINE_R

LINE_R_R LINE_L_R 1 C553 220P_0402_50V7K

Volume Control Circuit
+3VS +3VS R255 10K_0402_5% JAL90@ 2 1 1 C354 JAL90@ 2 1 0.1U_0402_16V4Z 5 1 U21 Y 4

34 LINE_L +3VS 1

3 6 2 1 SINGA_2SJ-E351-S03 CONN@

2

2

(HDA Jack)

U39

GND

R263 10K_0402_5% JAL90@ 2

1

For ESD I/O status: a. input/output mount 75 ohm b. input only mount 1K ohm

34,38 MIC_PLUG# MIC1_VREFO_L 1 MIC1_VREFO_R 1 8 7 5 4 2 MIC1_R_R MIC1_L_R 1 C538 220P_0402_50V7K 3 6 2 1

MIC JACK
JMIC1

4

P A COM B 2 1 3 1 2 R261 10K_0402_5% JAL90@ 1 C356 JAL90@ 0.01U_0402_16V7K 2 1 2 R257 10K_0402_5% JAL90@ 2 A G 3

NC

2 NC7SZ14P5X_NL_SC70-5 JAL90@

0.01U_0402_16V7K

XRE094PHDINB1-2-12-E-7016_3P JAL90@ 5
4

1 C353 JAL90@ 2

GND

34 MIC1_R 1 C357 0.1U_0402_16V4Z JAL90@ 34 MIC1_L

R437 2.2K_0402_5% R553 L37 75_0603_1% FBM-11-160808-700T_0603 1 JAL90@ 2 MIC1_R_1 1 2 1 JAL90@ 2 R554 75_0603_1% MIC1_L_1 1 2 L36 FBM-11-160808-700T_0603 1 C531 220P_0402_50V7K 2

R448 2.2K_0402_5%

TC74LCX74FT_TSSOP14 JAL90@

2

SINGA_2SJ-E351-S01 CONN@
4

2

2

ENCODER_DIR 31 ENCODER_PULSE 31

(HDA Jack)

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc. SCHEMATIC,LA-4201P
Document Number Rev I Sheet
E

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A B C D

401551
Monday, July 21, 2008 35 of 50

Date:

H2 H_3P0 @

H8 H_3P0 @

H11 H_3P0 @

H14 H_3P0 @

H17 H_3P0 @

H19 H_3P0 @

H20 H_3P0 @

H21 H_3P0 @

FAN1 Conn
+5VS C10 1 U2 +VCC_FAN1 EN_DFAN1 1 2 3 4 VEN VIN VO VSET GND GND GND GND 8 7 6 5 10U_0805_10V4Z 2 +5VS 1 H23 H_3P0 D2 1SS355_SOD323-2 2 D4 1 2 H3 H_3P2 @ @

1

1

1

1

1

1

1

H24 H_3P0 @

1

31 EN_DFAN1

APL5605KI_SOP8

H5 H_3P2 @

1

H10 H_3P2 @

H12 H_3P2 @

H13 H_3P2 @

H16 H_3P2 @

H18 H_3P2 @

H26 H_3P2 @

BAS16_SOT23-3 C396 10U_0805_10V4Z 1 2 +3VS 1 C399 1000P_0402_50V7K 1 2

1

1

1

1

1

1

1

H15 H_4P2 @

H6 H_4P2 @

H7 H_4P2 @

R299 10K_0402_5%

40mil
2 +VCC_FAN1 31 FAN_SPEED1 1 C393 1000P_0402_50V7K

1

1

JP12 1 2 3 ACES_85205-03001 CONN@

2

H9 H_4P1N @

H22 H_4P6X4P1N @

1

FD1 @

1

FD3 @

1

FD4 @

FD2 @

1

1

1

FIDUCIAL_C40M80

FIDUCIAL_C40M80

FIDUCIAL_C40M80

FIDUCIAL_C40M80

COVER LIGHTConn
+5VS JP14 C355 470P_0402_50V7K @ 1 1 2 3 4 1 2 G1 G2 ACES_88266-02001 CONN@

2

1

1

1

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc. SCHEMATIC,LA-4201P
Document Number Rev I Sheet 36 of 50

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

401551
Monday, July 21, 2008

Date:

A

B

C

D

E

+5VALW TO +5VS
+5VALW U23 8 7 6 5 D D D D S S S G 1 2 3 4 +5VS

+3VALW TO +3V_SB(ICH8M AUX Power)
+3VALW U32 8 7 6 5 D D D D S S S G 1 2 3 4 2 2 +3V

+5VALW 2 R259 100K_0402_5%

C360
1

1

C359

1

C348

1

C350

1

R256 470_0603_5% 1

C467

1

C501

1

C500

1

R397 470_0603_5% 3 1

10U_0805_10V4Z 2 2 10U_0805_10V4Z

SI4800BDY-T1-E3_SO8 10U_0805_10V4Z 2 2 1U_0603_10V4Z

2 10U_0805_10V4Z

SI4800BDY-T1-E3_SO8 10U_0805_10V4Z 2 2 1U_0603_10V4Z

29,30,38 SYSON#

SYSON# 6
1

1 Q31A 30,31,43,44 SYSON SYSON 1 R260 100K_0402_5% 2 2 1 +5VALW 2 R264 100K_0402_5% SUSP 1 3 Q31B 30,31,33,45 SUSP# 5 1 4 2N7002DW-T/R7_SOT363-6 33,45 SUSP 2N7002DW-T/R7_SOT363-6 R262 10K_0402_5% 2
2

3

+VSB

6

C349

4

2 1 R258 200K_0402_5%

5VS_GATE 1

Q30B 2N7002DW-T/R7_SOT363-6

Q39B 2N7002DW-T/R7_SOT363-6 5 SUSP +VSB 2 1 R394 200K_0402_5% SBPWR_EN# 3V_GATE 6 1 Q39A 2 1 C493 4

5

SBPWR_EN#

SUSP

2 1

Q30A 0.1U_0603_25V7K 2 2N7002DW-T/R7_SOT363-6

0.1U_0603_25V7K 2 2N7002DW-T/R7_SOT363-6

+3VALW TO +3VS
+3VALW U20 8 7 6 5 D D D D S S S G 1 2 3 4 2 C336 1 C337 1 R239 470_0603_5% 1 1 2 SUSP G Q27 2N7002_SOT23 3 D S 5VS_GATE +3VS

C339
2

1

C341

1

10U_0805_10V4Z 2 2 10U_0805_10V4Z

SI4800BDY-T1-E3_SO8 10U_0805_10V4Z 2 2 1U_0603_10V4Z

+5VALW 2

+1.8V to +1.8VS
+1.8V U11 8 7 6 5 D D D D S S S G 1 2 3 4 2 C274 1 C273 1 +1.8VS

+1.5V to +1.5VS
+1.5V U12 8 7 6 5 D D D D S S S G 1 2 3 4 C290 C279 2 1 1 24 SBPWR_EN# R193 470_0603_5% 31,44 SBPWR_EN 1 1 +1.5VS

R182 100K_0402_5% 1 SBPWR_EN# 1 R181 100K_0402_5% 2 3

C272

C266 SI4856ADY_SO8 JAL90PM@ 10U_0805_10V4Z 2 10U_0805_10V4Z PM@ 2 PM@ SI4856/AO4430

1

1

3

1

10U_0805_10V4Z 2 1U_0603_10V4Z PM@ 2 PM@

R192 470_0603_5% PM@

C285

1

C293

1

SI4800BDY-T1-E3_SO8 10U_0805_10V4Z 2 2 10U_0805_10V4Z

10U_0805_10V4Z 2 2 1U_0603_10V4Z

D

2 G Q11 S 2N7002_SOT23

+VSB
3

6

6

2 1 R191 510K_0402_5% PM@

1.8VS_GATE 1

Q14B 2N7002DW-T/R7_SOT363-6 PM@ 4 C278 PM@ 0.1U_0603_25V7K

5

SUSP

+VSB

4

2 1 R205 510K_0402_5%

1.5VS_GATE 1 C295

Q19B 2N7002DW-T/R7_SOT363-6

3

5

SUSP

3

SUSP

2 1

2 Q14A 2N7002DW-T/R7_SOT363-6 PM@

SUSP

2 1

0.1U_0603_25V7K 2 Q19A 2N7002DW-T/R7_SOT363-6

+1.5VS 2

+2.5VS 2

+1.05VS 2

+0.9VS 2

+1.8V 2

+1.5V 2

R190 470_0603_5% 1 1

R288 470_0603_5% PM@ 1

R33 470_0603_5% 1

R139 470_0603_5% @ 1

R189 470_0603_5% 1 D 2 SYSON# G Q17 2N7002_SOT23 1 3 S

R208 470_0603_5% @

1

1

1

1

D

D 2 SUSP G Q13 2N7002_SOT23

D 2 SUSP G Q36 2N7002_SOT23 PM@

D 2 SUSP G Q1 2N7002_SOT23

D 2 SUSP G Q7 2N7002_SOT23 @

1

3

3

3

3

4

3

S

S

S

S

S

2 SYSON# G Q20 2N7002_SOT23 @
4

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc. SCHEMATIC,LA-4201P
Document Number Rev I Sheet
E

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A B C D

401551
Monday, July 21, 2008 37 of 50

Date:

5

4

3

2

1

+3VS

+5VS

1

+3VS +3VALW

+5VS R546 10K_0402_5% @

R533 10K_0402_5% JAL90@

1
R547 10K_0402_5% @ EC_DOCKIN#_S0 Q35B 2N7002DW-T/R7_SOT363-6 JAL90@ 19,20
D

2

1

D

R282 JAL90@ 10K_0402_5%

R284 10K_0402_5% JAL90@

1

1

2

2

5 2 6
Q35A 2N7002DW-T/R7_SOT363-6 JAL90@

28,31 EC_DOCKIN#

2 1

4

3

2
EC_DOCKIN

1

20

2

C605 @ 0.1U_0402_16V4Z

JDOCK1
C

DOCK_B+
+5VALW +3VALW 34,35 LINEIN_PLUG# 35 D_LINE_L 35 D_LINE_R 34,35 MIC_PLUG# 35 D_MIC_L 35 D_MIC_R 35 AUDIO_GNDA 34,35 SPDIF 28 D_LAN_MIDI2+ 28 D_LAN_MIDI2D_LAN_MIDI2+ D_LAN_MIDI2-

C

67 68 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 72 73 74

19V_5A 5V_USB_3A LIN_IN_DT# LIN_IN_L LIN_IN_R MIC_DT# MIC_L MIC_R GNDA DOCK_DT1# SPDIF GND LAN_2 LAN_2# GND GND USB USB# USB_EN# RESERVED VGA_DT# LAN_PWR LAN_ACT LAN_LINK GND LAN_0 LAN_0# GND LAN_1 LAN_1# GND LAN_3 LAN_3# GND GND GND GND

ACER DOCK Normal
46 P3 47 (67) 48 49 33 50 34 51 35 52 36 53 37 54 38 55 39 56 40 57 41 58 42 59 43 60 44 61 45 62 63 P4 64 (68) 1 P1 (65) 2 3 20 4 21 5 22 6 23 7 24 8 25 9 26 10 27 11 28 12 29 13 30 14 31 15 32 16 17 P2 18 (66) 19

GND GND GND DVI_CLK DVI_CLK# GND DVI_TX0 DVI_TX0# GND DVI_TX1 DVI_TX1# GND DVI_TX2 DVI_TX2# GND VGA_R GND VGA_G GND VGA_B GND DOCK_DT2# HP_L HP_R HP_DT# GNDA DVI_DT DVI_DCDT DVI_DDCCK VGA_VS VGA_HS VGA_DDCCK VGA_DDCDT 5V_S0 GND GND GND

65 66 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 69 70 71

R283 10K_0402_5%

D_DVI_TXC+ 20 D_DVI_TXC- 20 D_DVI_TXD0+ 20 D_DVI_TXD0- 20 D_DVI_TXD1+ 20 D_DVI_TXD1- 20 D_DVI_TXD2+ 20 D_DVI_TXD2- 20 D_CRT_R_R D_CRT_R_G D_CRT_R_B R566 1 JAL90@ 2 0_0603_5% R567 1 JAL90@ 2 0_0603_5% R568 1 JAL90@ 2 0_0603_5% D_CRT_R 19 D_CRT_G 19 D_CRT_B 19

1

31 DOCKIN#

AUDIO_GNDA DOCKIN#

2 1
C374 0.1U_0402_16V4Z

2

23 USB20_P3 23 USB20_N3 29,30,37 SYSON# 19,23 CRT_DET# 28 D_LAN_ACTIVITY# 28 D_LAN_LINK# 28 D_LAN_MIDI0+ 28 D_LAN_MIDI028 D_LAN_MIDI1+ 28 D_LAN_MIDI128 D_LAN_MIDI3+ 28 D_LAN_MIDI3-

USB20_P3 USB20_N3

DOCK_DT2#

B

D_LAN_MIDI0+ D_LAN_MIDI0D_LAN_MIDI1+ D_LAN_MIDI1D_LAN_MIDI3+ D_LAN_MIDI3-

AUDIO_GNDA

R273 1 JAL90@ 2 1K_0402_5% D_HPOUT_L 35 D_HPOUT_R 35 HP_PLUG# 34,35 D_DVI_DET 20 D_DVI_SDATA 20 D_DVI_SCLK 20 D_CRT_VSYNC 19 D_CRT_HSYNC 19 D_DDC_CLK 19 D_DDC_DATA 19

B

+5VS

ACER DVR1027 Rev: 0.5

D_LINE_L D_LINE_R D_MIC_L D_MIC_R D_HPOUT_L D_HPOUT_R
A

C607 1 C608 1 C615 1 C616 1 C617 1 C618 1

2 @ 2 @ 2 @ 2 @ 2 @ 2 @

220P_0402_50V7K 220P_0402_50V7K 220P_0402_50V7K 220P_0402_50V7K 220P_0402_50V7K 220P_0402_50V7K

JAE_SP07-10207-22 CONN@

A

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc. SCHEMATIC,LA-4201P
Rev I Sheet
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

401551

Date:

Monday, July 21, 2008

38

of

50

5

4

3

2

A

B

C

D

Place at HW side

VIN

SP02000EF00
1

PJP1 G2 G1 4 3 2 1 6 5 DC_IN_S1 4 3 2 1

DOCK_B+
PL1 SMB3025500YA_2P 1 2DC_IN_S2

PD11 PDS1040-13_POWERDI5-3 2 1 3

1

PR1 1M_0402_1% 1 2

PJ1 2 2 1 1 PR2 10K_0402_5% PR4 10K_0402_5% 1 2 1 JUMP_43X79

VIN
1

VS

VIN
1 PR3 84.5K_0402_1% 1

2

2

2

2

PC3 1000P_0402_50V7K

PC4 100P_0402_50V8J

P

PC2 100P_0402_50V8J

PC1 1000P_0402_50V7K

PC6 0.1U_0603_25V7K 2 1

E&T_4510-E04C-01R 2 <BOM Structure> 2

PR8 10K_0402_5% 1 2

2

PR7 10K_0402_5%

PD3 GLZ4.3B_LL34-2

4

PU1A LM358DT_SO8

-

1

G

1 2 PC5 1000P_0402_50V7K

2

2

PR6 20K_0402_1%

23,31,32,42 ACIN

PD2 1SS355_SOD323-2 2 1 1

+

3

PR5 22K_0402_5% 1 2

1

1

1

1

2

8

0

2

RTCVREF

Vin Dectector

2

2

PBJ1

+
1 +RTCBATT +RTCBATT

Min. H-->L 16.976V L-->H 17.430V

Typ 17.525V 17.901V

Max. 17.728V 18.384V

ML1220T13RE 45@

VIN
+3VALWP
2 PD4 LL4148_LL34-2 PD5 LL4148_LL34-2 2 1 PQ1 TP0610K-T1-E3_SOT23-3 CHGRTCP PR11 200_0603_5% 1 2 1 N1 PR9 68_1206_5% 2 2 1

PJ2 2 2 1 1

PJ3

+3VALW

+1.5VP

2

2

1

1

+1.5V

JUMP_43X118

JUMP_43X118

PJ4

PJ5 1 1

3

BATT+

+5VALWP
1 1 PR10 68_1206_5%

2

2

+5VALW

+0.9VSP

2

2

1

1

+0.9VS
3

JUMP_43X118

JUMP_43X79

PJ6

PJ7 1 1

3

1

VS
1 PC8 0.1U_0603_25V7K

+VSBP

2

2

+VSB

+1.8VP

2

2

1

1

+1.8V

JUMP_43X39

JUMP_43X118

PR12 100K_0402_1% PR13 22K_0402_1% 1 2 2

1 2 PC7 0.22U_1206_25V7K 2

2

PJ8

PJ17 1 1

+1.05VSP

2

2

+1.05VS

+1.8VP

2

2

1

1

+1.8V

32,33 51ON#

JUMP_43X118

JUMP_43X118

PJ16 1

PJ9 1 1

RTCVREF
PR15 560_0603_5% 1 2 PR16 560_0603_5% 1 2

+1.05VSP
PR14 200_0603_5%

2

2

+1.05VS

+2.5VSP

2

2

1

1

+2.5VS

JUMP_43X118

JUMP_43X118

+CHGRTC
4

3 1

OUT GND

IN

2

N2

1

2 PC10 1U_0805_25V4Z

3.3V

PU2 G920AT24U_SOT89-3

2

2

PC9 10U_0805_10V4Z

4

1

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc. SCHEMATIC,LA-4201P
Rev I Sheet
D

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

401551

Date:

Monday, July 21, 2008

39

of

50

A

B

C

A

B

C

D

PH1 under CPU botten side : CPU thermal protection at 96 degree C Recovery at 60 degree C
VL VL VL

VMB
1

PJP2 1 2 3 4 5 6 7 1 2 3 4 5 6 7 BATT_S1 1 EC_SMCA EC_SMDA

PL2 SMB3025500YA_2P 1 2 1

2 PR17 47K_0402_1% PR18 47K_0402_1% 1 2 8 3 2 MAINPWON 22,41 1 1 1 1

1

BATT+
PC13 0.01U_0402_25V7K

2

2

PC12 1000P_0402_50V7K

2

PR19 13.3K_0402_1% 1 2 TM_REF1

2

PH1 100K_0603_1%_TH11-4H104FT

PC11 0.1U_0603_25V7K

PQ2 DTC115EUA_SC70-3 PD6 2 1 2

+ -

P

G

SUYIN_250133MR007G115ZL

O 4

1

PU3A LM393DG_SO8

LL4148_LL34-2 3

2

2

PR22 13.3K_0402_1%

1

1

PR20 100_0402_1% 1 1

PR21 100_0402_1%

PC14 0.22U_0603_16V7K

2

PR24 6.49K_0402_1% 2 1

+3VALWP

PC15 1000P_0402_50V7K

PR23 100K_0402_1% 2 1 VL

2

2

1

1

1 PR25 100K_0402_1% 2

PR26 1K_0402_1% 2
2

2

BATT_TEMP 31

EC_SMB_CK1 17,31 EC_SMB_DA1 17,31

PH2 near main Battery CONN : BAT. thermal protection at 79 degree C Recovery at 47 degree C
VL 2 VL @ PR28 @PR28 47K_0402_1% 1 2 1 @ PD7 @PD7 LL4148_LL34-2 2 1
3

@ PR27 @PR27 47K_0402_1%

PQ3 TP0610K-T1-E3_SOT23-3 @ PH2 @PH2 100K_0603_1%_TH11-4H104FT PC16 0.22U_1206_25V7K

1

VL 2 @ PR30 @PR30 9.09K_0402_1% 1 2 1 TM_REF1 @ PR32 @PR32 22.1K_0402_1% 2

B++
1 1 PR29 100K_0402_1%
3

3

1 PC17 0.1U_0603_25V7K

+VSBP
1

5 6

+ -

P

8

2

2

VL
2

PR31 22K_0402_1% 1 2

G

@

@

O 4

7

PU3B LM393DG_SO8

2

2

PR33 100K_0402_1% PR34 0_0402_5% 2 1 1 1 D PQ4 2N7002W-T/R7_SOT323-3 3 S

41 SPOK

1

2 G PC19 0.1U_0402_16V7K

4

2

@

2

@ PC18 @PC18 0.22U_0603_16V7K

1

4

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc. SCHEMATIC,LA-4201P
Rev I Sheet
D

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

401551

Date:

Monday, July 21, 2008

40

of

50

A

B

C

5

4

3

2

1

ISL6237_B+
PL12 FBMA-L11-322513-151LMA50T_1210 1 2 PC145 470P_0402_50V7K 2 1
D

ISL6237_B+
PR35 0_0805_5% 1 2

B++
PC147 470P_0402_50V7K 2 1

B+

PL13 FBMA-L11-322513-151LMA50T_1210 1 2 PC148 470P_0402_50V7K 2 1 PC22 2200P_0402_50V7K 2 1 PC20 4.7U_1206_25V6K 2 1 PC21 4.7U_1206_25V6K 2 1

PC146 470P_0402_50V7K 2 1

PC23 4.7U_1206_25V6K 2 1

PC27 1U_0603_10V6K 1 2

VL
PC28 4.7U_0805_6.3V6K 2 1 PQ6 AO4466_SO8 4

1

PQ5 AO4466_SO8 4

PC26 0.1U_0603_25V7K

PC24 4.7U_1206_25V6K 2 1

PC25 2200P_0402_50V7K 2 1

D

8 7 6 5

2

5 6 7 8

+5VALWP
3 2 1
PL4 8.2UH_PCMB063T-8R2MS_4.5A_20% 2 1 PR39 4.7_1206_5% 2 1

+3VALWP

1

8 7 6 5

2

2

1

2
C

LX3 DL3

2

1 2 3

PC33 680P_0402_50V7K

25 23

PHASE2 LGATE2

PHASE1 LGATE1 PGND

16 18 22 10 11

LX5 DL5

PC34 680P_0402_50V7K 2 1

1

1

1

PC30 330U_D3L_6.3VM_R25M

+

PR38 0_0402_5%

4

PC31 0.1U_0603_25V7K

PC32 0.1U_0603_25V7K

2

4

PR41 63.4K_0402_1% 2

1

2

PR36 4.7_1206_5%

PQ7 AO4712_SO8

DH3 PR37 2 1 BST3A 2.2_0603_5%

26 24

UGATE2 BOOT2

UGATE1 BOOT1

15 17

DH5 PR40 2.2_0603_5% BST5A 2 1

PQ8 AO4712_SO8

5 6 7 8

33

VCC

LDO

VIN

PL3 8.2UH_PCMB063T-8R2MS_4.5A_20% 1 2

1 2 3

6

3

7

TP

PVCC

19

PC29 1U_0603_10V6K 1 2

1
+ PC35 C 150U_D2E_6.3VM_R18

3 2 1

1

2
PR43 10K_0402_1% 1 2

2

FB3 @ PR42 10K_0402_1%

30 32

OUT2 OUT1 REFIN2 FB1 REF BYP LDOREFIN SKIP 29 9
@ PR44 2 PR45 1 0_0402_5% 1 0_0402_5% 2 FB5

VL

1

2VREF_ISL6237
1
PC36

2

1

0.22U_0603_10V7K

8

PR47 200K_0402_5% 1 2

B

+3.3VALWP Ipeak=8.444A ; Imax=5.91A Choke DCRmax=60m ohm, DCRtyp=54m ohm Rds(on)=18m ohm(max) ; Rds(on)=15m ohm(typical) Vlimit=(5E-06 * 330K)/10=165mV Ilimit=165mV/18m ~ 165mV/15m =9.167A ~ 11A VS Iocp=Ilimit+Delta I/2 =10.134A ~ 11.967A Delta I=1.934A (Freq=300KHz)
PD12 1SS355_SOD323-2

VL

PD8 GLZ5.1B_LL34-2 1 2

PR46 100K_0402_1% 1 2

20 4 2 14 27 2 PR51 0_0402_5% 2

NC EN_LDO EN1 EN2 GND TON

POK2 POK1 ILIM1 ILIM2

28 13 12 31
ILM1 ILIM2

SPOK 40
PR48 330K_0402_1% 2 1
B

1

PC37 0.22U_0603_25V7K

1

NC

2

1

5

2

2

2

1

22,40 MAINPWON

A

2

PQ35 TP0610K-T1-E3_SOT23-3

2

@ PC39 0.047U_0402_16V7K

3

2VREF_ISL6237 2

PR54 0_0402_5% 2

1

@ PR55 47K_0402_5% 1 2 PC38 0.047U_0603_16V7K 0.047U_0603_16V7K

2VREF_ISL6237 1

PC143 1U_0603_10V6K 1 2

PR52 806K_0603_1%

2

1

1

PR53 0_0402_5%

21

VL

@ PR50 0_0402_5%

PU4 ISL6237IRZ-T_QFN32_5X5

PR49 330K_0402_1%

+5VALWP Ipeak=8.444A ; Imax=5.91A Choke DCRmax=60m ohm, DCRtyp=54m ohm Rds(on)=18m ohm(max) ; Rds(on)=15m ohm(typical) Vlimit=(5E-06 * 330K)/10=165mV Ilimit=165mV/18m ~ 165mV/15m =9.167A ~ 11A Iocp=Ilimit+Delta I/2 =10.147A ~ 11.980A Delta I=1.96A (Freq=400KHz)
A

1

1

1

Security Classification Issued Date 2007/09/20

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc. SCHEMATIC,LA-4201P
Rev I Sheet
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

401551

Date:

Monday, July 21, 2008

41

of

50

5

4

3

2

A

B

C

D

VIN
1

PQ9 SI4835BDY-T1-E3_SO8 8 7 6 5 4 3 2 1 3 2 1

PQ10 SI4835BDY-T1-E3_SO8 8 7 6 5 4

B+
PR56 0.015_2512_1% PJ11 PC44 2200P_0402_25V7K PC42 4.7U_1206_25V6K PC43 4.7U_1206_25V6K 2 1 1 PC40 0.01U_0402_25V7K 2 2 2 PR57 100K_0402_1% 2 1 1 1 1 2 4 3 CHGEN# PC48 0.1U_0805_25V7K 1 2 PR61 2.2_0603_5% 1 2 2 2 1 1 CHG_B+ JUMP_43X118

PC45 0.01U_0402_25V7K

PR58 3.3_1210_5% 2
1

PR59 100K_0402_1%

1

1

PC46 0.1U_0402_16V7K 1 2 1 1 PC47 0.1U_0603_25V7K

2

5 6 7 8

1 2 3

1

PU5 1 CHGEN PVCC 28 PVCC

1

PR174 3.3_1210_5% 2 2 PR60 340K_0402_1% PC50 2.2U_0805_25V6K 1

2

/BATDRV

PQ12 SI4835BDY-T1-E3_SO8 4

2

2

@PC49 @PC49 0.1U_0603_25V7K ACN ACP

BTST HIDRV PH

27 26 25

BTST

4

PQ11 AO4466_SO8

3 2 1

2

ACDRV ACDET

4 5

ACDRV ACDET

1

Place close to back to back MOS REGN 2

PC52 10U_1206_25V6M

LX_CHG PD10 2

1

1

2

PL5 10UH_PCMB104T-100MS_6A_20% 1 2 PR64 4.7_1206_5% 2

PR62 0.02_2512_1% 1 2 4 3

5 6 7 8

2 3

ACN ACP

1

DH_CHG

BATT+
PC53 10U_1206_25V6M 1 1 2

24751_VREF

CELLS
2 @ PR65 @PR65 100K_0402_1% 1

GND VREF

3 Cell
1

PR63 54.9K_0402_1%

ACSET

6

ACSET REGN

1

4 Cell
2

PR67 340K_0402_1% 1

ACOP LODRV PGND OVPSET AGND LEARN

CELLS D @ PQ14 2N7002W-T/R7_SOT323-3 2 3S/4S# 31 G 1

OVPSET

22

3 2 1

23

DL_CHG

2

PR66 0_0402_5% 1 2

PC56 0.47U_0603_16V7K 1 2 7

1

PC54 1U_0603_10V6K

4

PQ13 AO4466_SO8

PC55 680P_0402_50V7K

2

8 9

2

PC57 0.1U_0402_16V7K 1 2 ACOFF 31 1 PC58 0.1U_0603_25V7K 1 @PC59 @PC59 0.1U_0603_25V7K

2

24

5 6 7 8

PC51 LL4148_LL34-2 0.1U_0603_25V7K

2

3

S

2

21

PR68 54.9K_0402_1%

Cells selector
1 PQ15 SI2301BDS-T1-E3_SOT23-3 PR69 100K_0402_1% 1 2PQ15_GATE 2 1 3

2

CELLS VREF

24751_VREF 10 PC60 1U_0603_10V6K 1 PR70 100K_0402_1% 2 VADJ 1

2

SRP 11 VDAC SRN BAT 12 VADJ

19 18 17

SE_CHG+ SE_CHG-

CP Point Setting
CP point=Iadapter*85% 90W adapter Vacset=3.3*(100K/(64.9K+100K))=2.001V CP Point=(Vacset/Vvdac)*(0.1/PR56)=4.04A 65W adapter R=(100K*100K)/(100K+100K)=50K Vacset=3.3*(50K/(50K+64.9K))=1.436V

2

2

ACSET

1

PC62 0.1U_0603_25V7K ACGOOD#

1

PC61 0.1U_0603_25V7K

13

TP ACGOOD SRSET BATDRV IADAPT

29

Icharge Setting

ICHG setting
16 SRSET PR72 10_0603_5% 1 2 1 1

VMB
1

/BATDRV

PR71 17.4K_0402_1% 2 1

14

IREF 31

For 2200mA, Icharge=0.8C=0.8*2*2.2=3.52A For 2400mA, Icharge=0.8C=0.8*2.4*2=3.84A Icharge=(Vsrset/Vdac)*(0.1/PR62) IREF=((100k/(100K+17.4K))/3.3)*(0.1/0.02)=Icharge

CP POINT=(1.436V/3.3V)*(0.1/0.015)=2.901A
3

15

PR73 100K_0402_1% 2 2

IREF=0.7748*Icharge
@PC63 @PC63 0.01U_0402_25V7K 24751_VREF
3

Input OVP : 22.3V LI-4S :18.0V----BATT-OVP=2.001V Input UVP : 17.26V BATT-OVP=0.1112*VMB Fsw : 300KHz

VS
2 PC65 0.01U_0402_25V7K

1

PR74 340K_0402_1%

BQ24751ARHDR_QFN28_5X5 PC64 100P_0402_50V8J 24751_VREF PR179 100K_0402_1% 2 1 24751_VREF PR180 200K_0402_1% 2 1

2

24751_VREF

20

CELLS

2 @ PR75 @PR75 100K_0402_1% ADP_I 31 @ PR176 @PR176 0_0402_5% 1 1 24751_VREF 2 ACIN 23,31,32,39 1 ACGOOD# 2 G 3 VADJ S 24751_VREF 1 2 PC144 1000P_0402_50V7K 1 PR81 100K_0402_1% CHGEN# D PQ18 2N7002W-T/R7_SOT323-3 3 S
4

1

LI-3S :13.5V----BATT-OVP=1.5012V BATT-OVP=0.1112*VMB Per cell=3.5V
PR77 10K_0402_1% 1 2 PU1B LM358DT_SO8 7 0 8

1

PQ15_GATE 1 D PQ36 SSM3K7002F_SC59-3 3 S REGN 1 PQ17 SI2301BDS-T1-E3_SOT23-3 3 S D 1

1

PR76 499K_0402_1% 2

2

2

PR78 887K_0402_1% PR80 0_0402_5% 1 2

D @ PQ16 2N7002W-T/R7_SOT323-3

+ -

5 6 1 PC66 0.01U_0402_25V7K PR79 105K_0402_1% 2 1 PC163 0.1U_0402_16V7K ACOFF 1 2

P

G

1

31 BATT_OVP

D

2 G

2

2 G 3 PR181 340K_0402_1% 2 1 S PQ37 SSM3K7002F_SC59-3

4

2

PR82 100K_0402_1% 2

1

D PQ19 2N7002W-T/R7_SOT323-3

1

1

PR83 64.9K_0402_1% 24751_VREF 1 2

@ PR177 @PR177 4.3K_0402_5%

PR84 221K_0402_1% 2 1

G

2

2

ACSET

2

31 CALIBRATE#
4

2 G 3 S

2

1

PR85 100K_0402_1%

31 FSTCHG

2 G

1

D 2

PR86 100K_0402_1%

31 65W/90W#

2 G PQ20 2N7002W-T/R7_SOT323-3

Charger ADJ 4.0V 4.1V

Calibrate# L L H

PR78 @ 887K @
B

PR84 @ 221K @
Security Classification Issued Date 2007/09/20

3

S

Compal Secret Data
Deciphered Date 2008/09/20
Title

Compal Electronics, Inc. SCHEMATIC,LA-4201P
Rev I Sheet
D

CP setting
A

4.2V

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORM

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