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Multi-channel data acquisition for a free-towed synthetic aperture sonar


Multi-Channel Data Acquisition for a Free-Towed Synthetic Aperture Sonar
P. J. Barclay, M. P. Hayes, and P. T. Gough Acoustics Research Group, Dept. of Electrical and Computer Engineering, University of Canterbury, Private Bag 4800, Christchurch, NZ Email: {p.barclay,m.hayes,p.gough}@elec.canterbury.ac.nz

Abstract:

This paper describes the data acquisition system developed for the KiwiSAS-III Synthetic Aperture Sonar (SAS), developed by the Acoustics Research Group at the University of Canterbury. This sonar system is designed to provide high resolution imagery of the sea?oor in a shallow water environment. The data-acquisition system is based around a custom rack of electronics interfaced to a standard PC for data storage and display. A central design feature is the fully synchronous nature of all real-time components to ensure coherent image processing techniques can be applied to the data. Data-acquisition, Digital Down Converter, FPGA

Keywords:

1.

INTRODUCTION

The KiwiSAS-III is a free-towed, side scanning sonar system being developed by the Acoustics Research Group at the University of Canterbury. The sytem is designed as a competely coherent system allowing post-processing signal processing to be applied to the data. In particular, research is being performed on Synthetic Aperture Sonar (SAS) algorithms and bathymetric terrain mapping.

Figure 2: KiwiSAS-III tow?sh.
H.M.S. Gough

Figure 1: KiwiSAS system in operation.

There are two major components to the system; the free-towed tow?sh, and the towboat hardware as outlined in Figures (1, 2). The tow?sh is a nose towed,

blunt nose design with stabilizing ?ns at the rear. These features are intended to make the tow?sh more stable when towed reducing blurring of the resulting imagery. The tow?sh is connected to the towboat via a 50 m multi-core towcable. To minimise the complexity and cost of the water sealed tow?sh the data acquisition hardware is located on the towboat, with all data signals to and from the tow?sh in an analogue form. The system is designed to operate in a continuous data acquisition mode and due to the coherent nature of the data processing, all real-time parts of the system must operate synchronously. The data acquisition hardware is mounted in a standard 19” Eurocard rack, connected to a standard PC via a custom PCI card.

2.

TOWFISH ELECTRONICS
240V GENERATOR

The tow?sh can be considered to have three separate sub-systems. These consist of the transmitter, receiver, and instrumentation as shown in Figure (3). Each of these three sub-systems are independent except for a common power supply.

GPS

PC

LINE PRINTER

12V BATTERIES

INSTRUMENT RACK

MONITOR

INTERFACE POWER AMPLIFIERS PRE AMPLIFIERS TRANSMITTER

Figure 4: Block diagram of towboat electronics.

SIGNAL CONDITIONING

RECEIVERS

3.1
NAVIGATION SENSORS

Central Computer

Figure 3: Block diagram of tow?sh electronics.

The transmitter consists of 12 power ampli?ers, each ampli?er driving three Tonpilz[1] projectors. All ampli?ers are driven with the same signal, so no electrical beam steering is available. The power ampli?ers are powered directly off the ±12 V lines of the towcable. Power decoupling is provided via two capacitor banks of 42000 uF each within the tow?sh. These capacitor banks ensure the supply voltage does not droop during the period of transmission. The receiver hydrophone consists of nine 75 × 75 mm PVDF tiles arranged in a 3 × 3 grid. Each row of three are wired in parallel and connected to a 40dB pre-ampli?er. These three signals are sent to the towboat via the towcable using differential line transmitters (EL2140C). In order to estimate the orientation of the tow?sh an instrumentation package in included in the rear can of the tow?sh. This device contains an inclinometer, magnetomteters, and accelerometers. These sensors are interfaced using an 8-bit microcontroller, and the resulting digital data stream sent to the towboat using NMEA type sentences via an RS-232 link[2].

The central compter is an off the shelf dual-processor Pentium III system running the Linux operating system. This computer is mounted in a sturdy metal box with large handles to ease transportation. This central computer primarily records the incoming data from the instrument rack of Section 3.3 via a custom built PCI interface card[3]. This data is recorded onto a standard IDE hard-disk in raw form to allow post processing to be performed. During data collection some form of feedback to the boat crew is required to ensure correct operation of the system. To do this, the data is pulse-compressed (correlated with the transmitted signal) and displayed on a ?at screen monitor in real time. This display stream is user con?gurable providing valuable information to the boat crew. The data is also recorded in a hard form using a thermal line printer. This provides a longer term history of the sonar operation. The software application running on the computer consists of two main programs. The background task provides the real time data acquisition and storage of the incoming data streams. The second task provides the visual display of this recorded data, and also any real-time processing as required. Only the raw data stream is recorded to the disk, all other processing is only used for visual display.

3.2

Auxiliary Systems

3.

TOWBOAT ELECTRONICS

Since this sonar system is designed to be operated from a variety of small vessels the system must be simple, self contained and easy to transport. On board the boat all equipment is housed in small, sturdy containers with large transportation handles. The overall towboat setup is outlined in Figure (4).

A standard 12 channel GPS receiver on the boat provides a basic navigation recording. This positioning information is transfered to the central computer as NMEA type sentences via a serial RS-232 connection. These sentences are then tagged to synchronise the data streams from the tow?sh and recorded onto the disk. This positioning information is of limited use for the development of synthetic aperture algorithms since the GPS receiver must be located on the towboat and not the tow?sh.

POWER SUPPLIES

WAVEFORM GENERATION TIMING GENERATION

CUSTOM BACKPLANE

RECEIVER #1 CABLE INTERFACE RECEIVER #2

COMPUTER INTERFACE

RECEIVER #3

12V BATTERY INTERFACE

Figure 5: Block diagram of towboat instrumentation rack electronics.

Power for all the systems on the boat is generated by a portable petrol 240 V generator. The tow?sh is powered separately from two large capacity, deep cycle 12 V lead-acid batteries. These batteries help reduce electical switching noise in the tow?sh electronics by separating the power supplies of the tow?sh and the towboat.

of each connector are divided into six groups of three providing analog connections to each card. Rather than being connected to all cards as a bus, these connections are to connectors on the back of the backplane. This then allows a point-to-point connection of these signals to be made as required.

3.3

Instrument Rack

The rack of electronics on board the boat provides the heart of the real-time sonar system. This rack provides all the interfacing beteen the computer and the towcable, as outlined in Figure (5). It is housed in a 19” Eurocard rack, utilising a custom backplane for communication between the cards. Each card in the rack is allocated a unique four-bit card number by jumpers on each card. This then allows the cards to be individually addressed from the central computer.

3.3.1 Backplane. The backplane is the only communication channel between the various cards within the rack. Connections to each card are provided via 16 64-pin DIN connectors spaced at a distance of 4HP (1HP=5.08mm). It is an entirely passive device with three main groups of signals. The top 32 pins of each connector are connected in a parallel bus, used for digital communication between the cards. The next 14 pins are used for DC power supplies to each of the cards as outined in Section 3.3.2. The bottom 18 pins

3.3.2 Power Supplies. The entire electronics rack is designed to run from a single 240 V AC power source. From this several raw DC power supplies are derived using a single transformer with multiple secondary windings. These raw supplies are ±8 V used for analog supplies, +8 V for digital supplies, and ±15 V for auxilary supplies. Each of these raw supplies is routed along the backplane to all cards, each of which linearly regulate the supplies as required. Typically the 8 V lines are regulated to 5 V and the 15 V lines are regulated to 12 V. By separating the analog and digital supplies at the power transformer noise is minimised. Each of the supplies has separate ground returns, and are completely isolated from each other. In order to ensure common ground potential between the analog and digital supplies, these grounds are connected by 0 ? resistors under the AD converter on each of the receiver cards.

3.3.3 Computer Interface. This is a simple card providing buffering and termination of the high speed serial link to the computer and the backplane. It also contains a phase locked loop (PLL) chip (MC88915)

to provide the main 40 MHz clock for the entire system. Buffering between the computer and backplane is achieved using HCT family buffers.

down-sampled to a lower rate, allowing low order antialiasing ?lters to be used. This simpli?es the ?lter design, reducing the phase effects within the resulting signal spectrum. The incoming differential signal from the tow?sh are terminated and converted to a single ended signal using a differential receiver (EL2142C); the matched receiver to the transmitter in the tow?sh. The input of the receiver may also be switched via a relay to an auxilary test input from the backplane. This allows a known test signal to be used as the input for any of the receivers to test their operation. This relay is under software control from the PC. The single ended signal then passed though a gain stage (AD603), variable from -10 dB to +30 dB, again under software control. This allows the maximum signal to be applied to the ADC without overloading it. From the output of the variable gain stage the signal is low pass ?ltered using a LCL ?lter module (P3LP-300) with a cutoff frequency of 300 kHz. This ?ltered signal is then applied to the input of the ADC (CLC952) via a center-tapped transformer, driven by a unity gain buffer. The transformer is necessay to level shift the signal from a bipolar signal to a unipolar signal suitable for the input of the ADC. The ADC input is also routed to the front panel for monitoring via a dedicated buffer. The AD converters are operating at the full 40 MHz clock frequency, performing 12-bit signal conversions. This digital data is bussed to a Digital Down Converter (DDC) (HSP50016) chip performing a frequency shift and decimation of the data stream. The operation of the DDC is under complete software control, allowing tuning of the internal circitry to the desired spectrum portion of interest. This card is digitally controlled from a Complex Programmable Logic Device (CPLD) (XC95108). This device also time division multiplexes (TDM) the serial data streams from the two DDC devices. Each DDC produces a 33-bit data word, consisting of a frame pulse followed by 32 data bits. The data streams from each of the three receiver cards are then combined into one serial TDM stream, transmitted to the PC via the custom PCI card, as shown in Figure (6). Data from the three receiver cards is time division multiplexed together to form one data stream for transmission to the PC. This is achieved by allocating each card a unique slot number within the data stream. Each card then holds the serial lines in a tri-state condition until their time slot is reached. The card then drives the serial lines with the data from the two DDCs, then returns to a tri-state condition to allow another card to take control of the bus. This time slot allocation is achieved by setting a register within the receiver card CPLD. The power supplies for the card are derived from the raw DC supplies of the backplane, linearly regulated

3.3.4 Timing/Waveform Generation Card. This card has two primary functions. The ?rst is to generate all the timing signals to control the other parts of the system. The second is to generate the arbitrary analog waveforms used as the acoustical transmitted signal. Central to this card is an FPGA (XILINX XC4003E), booted from an onboard serial PROM chip (XC17108E). This FPGA device is con?gured with several internal registers addressable via the backplane. The overall timing of the system is controlled via two internal registers of the FPGA. These registers control the length of the transmitted waveform and the overall repetition period of the waveform. These timing signals are transmitted to the other cards in the system via the digital portion of the backplane. They are also buffered and routed to BNC test connectors on the front panel. The arbitary signals used by the sonar are downloaded into a ?eld memory device from the central computer, via the FPGA. These waveforms are then converted to an analog signal using a dual-channel, 12-bit, digital to analog converter (DAC7801). The outputs of the DAC are then buffered and passed out to the backplane via differential transmitters (EL2140C). The single ended signal is also routed to a BNC test point on the front panel via a dedicated buffer. This allows an oscilloscope to be connected to monitor the transmitted signal. There is no gain control over any of the transmitted signals, other than varying the maximum digital code stored in the Field Memory. This is because the transmitter of the sonar is always operated at maximum signal levels to maximise acoustic response.

3.3.5 Receiver Card. The primary role of the receiver cards is to take the incoming differential signals from the tow?sh and convert them into a suitable digital format for storage on the computer harddisk. Each card has two independent, identical receiver channels. To provide syncronicity between all the reciever channels, all devices are controlled from the same clock and timing signals from the waveform card. Each receiver channel consists of an analog shaping stage, the digital conversion, and then digital down conversion to lower the data rate. Each channel is intially sampled as 12-bits 40 MSps, and then down-converted to 16-bit real, 16-bit imaginary samples at approximately 30 kSps. The data is sampled at a much higher than Nyquist rate and

FRAME SYNC DATA 32bits DDCa 32bits DDCb 32bits DDCc 32bits DDCd 32bits DDCe 32bits DDCf

Receiver Card #1

Receiver Card #2

Receiver Card #3

Figure 6: Time division mulitipled bus for data.

to ± 5V for the analog circuits and +5 V for the digital circuits. This separation of the power supplies is to reduce the interference from the digital switching into the analog signals.

4.

EXAMPLE DATA

Results from a test site in Sydney Harbour, Australia are shown in Figure (7). This scene contains several man-made objects including several point re?ectors, and a ladder-like structure. Also present is a natural bland background.

allow the transmitted beam to be steered in azimuth. This increase in both transmitter and receiver channels has necessitated the inclusion of an computer system within the tow?sh housing and the development of a new multi-channel data acquisition system[3]. This new system will also incorporate a new navigation system to precisly position the tow?sh while imaging. This system will use ?xed transponders placed on the sea?oor in a long baseline con?guration [4, 5].

6.

CONCLUSION

The KiwiSAS-III system has been used to collect sonar data on several occasions in various locations. This data has allowed algorithms to be developed for a number of image processing stages, including synthetic aperture reconstruction, direct autofocus[6], statistical autofocus[7] and bathymetry[8, 9]. The hardware described here an essential part of the data collection process, shown to be reliable under a range of trying conditions.

7.

ACKNOWLEDGEMENTS

Figure 7: Sonar image from a test site in Sydney Harbour, Australia after synthetic aperture with autofocus processing has been applied.

We would like to thank the other members of the Acoustics Research Group. Also members of the Workshop, in particular Mike Cusdin, Steve Downing, Nick Smith, and Peter Lambert for their contributions to the sonar. Imagery in Section (4.) collected on sea-trials of the KiwiSAS system for the Australia Defense Science Technology Organisation (DSTO).

5.

KIWISAS-IV

The KiwiSAS system is currently under reconstruction to incorporate a new array of receiver elements, increasing the total number of receiver elements to 18. This will allow further work in the autofocus ?eld to be performed. This will also allow faster towboat operation or in increase in imaging range. The transmitter is also being redesigned to allow the individual elements to be driven with independent signals. This will

8.

APPENDIX

? XILINX www.xilinx.com XC95108 In-System Programmable CPLD XC4003 Field Programmable Gate Array XC17108 Serial Con?guration PROM

? Analog Devices www.analog.com CLC952 12-bit, 41 MSPS Monolithic A/D Converter AD603 Low Noise, 90 MHz Variable-Gain Ampli?er ? Burr-Brown (Texas Instruments) analog.ti. com DAC7801 Dual Monolithic CMOS 12-bit Multiplying Digital to Analog Converters ? OKI Semiconductor www.okisemi.com MSM518221 282,214-Word × 8-bit Field Memory ? Motorola www.motorola.com MC88915 Low Skew CMOS PLL Clock Driver ? Harris (Intersil) www.intersil.com HSP50016 Digital Down Converter ? Elantec (Intersil) www.intersil.com EL2140 Differential Twisted Pair Driver EL2142 Differential Line Receiver ? Coilcraft www.coilcraft.com P3LP Low Pass LC Filter Modules WB2010 Wide Band RF Transformers

[7] S. A. Fortune, M. P. Hayes, and P. T. Gough. Statistical autofocus of synthetic aperture sonar images using image contrast optimisation. In Oceans 2001, volume 1, pages 163–169. IEEE, November 2001. [8] P. J. Barclay, M. P. Hayes, and P. T. Gough. Using a multi-frequency synthetic aperture sonar for bathymetry. In Image and Vision Computing New Zealand 2001, pages 63–68, University of Otago, Dunedin, New Zealand, November 2001. [9] M. P. Hayes, P. J. Barclay, P. T. Gough, and H. J. Callow. Test results from a multi-frequency bathymetric synthetic aperture sonar. In Oceans 2001, pages 1682–1688. IEEE, November 2001.

9.

REFERENCES

[1] D. W. Hawkins and P. T. Gough. Multi-resonance design of a Tonpilz transducer using the ?nite element method. 43(5):231–239, September 1996. [2] E. N. Pilbrow, P. T. Gough, and M. P. Hayes. Inertial navigation system for a synthetic aperture sonar tow?sh. In Proceedings of Electronics New Zealand Conference, Dunedin, New Zealand, November 2002. [3] M. P. Hayes, P. J. Barclay, and T. J. Hawkins. An embedded compact PCI computer system for a synthetic aperture sonar tow?sh. In Proceedings of Electronics New Zealand Conference, Dunedin, New Zealand, November 2002. [4] E. N. Pilbrow, P. T. Gough, and M. P. Hayes. Long baseline precision navigation system for synthetic aperture sonar. In Proceedings of The 11th Australasian Remote Sensing and Photogrammetry Association Conference, Brisbane, Australia, November 2002. [5] E. N. Pilbrow, P. T. Gough, and M. P. Hayes. Dual-transponder precision navigation system for synthetic aperture sonar. In Proceedings of Electronics New Zealand Conference, Dunedin, New Zealand, November 2002. [6] H. J. Callow, M. P. Hayes, and P. T. Gough. Autofocus of multi-band, shallow-water, synthetic aperture sonar imagery using shear-averaging. In IGARSS 2001. IEEE, July 2001.



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